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Martin Roth4a45ab82019-09-23 18:23:02 -06001# SPDX-License-Identifier: GPL-2.0-only
Alexander Couzens77103792015-04-16 02:03:26 +02002
Furquan Shaikhbf4b7b02020-04-30 18:08:16 -07003config ACPI_AMD_HARDWARE_SLEEP_VALUES
4 def_bool n
5 help
6 Provide common definitions for AMD hardware PM1_CNT register sleep
7 values.
8
9config ACPI_CPU_STRING
10 string
Felix Heldf0a8b042023-05-12 15:55:06 +020011 default "CP%02X"
Furquan Shaikhbf4b7b02020-04-30 18:08:16 -070012 depends on HAVE_ACPI_TABLES
13 help
Felix Held2fc27582023-01-25 16:25:27 +010014 Specifies the ACPI name format string used by the acpigen
Felix Heldf0a8b042023-05-12 15:55:06 +020015 function to generate the processor scope. Default is CPxx.
Furquan Shaikhbf4b7b02020-04-30 18:08:16 -070016
17config ACPI_HAVE_PCAT_8259
18 def_bool y if !ACPI_NO_PCAT_8259
19
Aaron Durbin20a588b2016-07-13 23:13:25 -050020config ACPI_INTEL_HARDWARE_SLEEP_VALUES
21 def_bool n
22 help
Marshall Dawson6139a5c62017-10-04 15:10:00 -060023 Provide common definitions for Intel hardware PM1_CNT register sleep
24 values.
25
Kyösti Mälkki3139c8d2020-06-28 16:33:33 +030026config ACPI_SOC_NVS
27 bool
28 help
29 Set to indicate <soc/nvs.h> exists for the platform with a definition
30 for global_nvs.
31
Kyösti Mälkki027f86e2022-12-02 15:30:10 +020032config ACPI_GNVS_USB_CHARGECTL
33 bool
34 depends on ACPI_SOC_NVS
35 help
36 Set to indicate <soc/nvs.h> implements fields s3u0, s3u1, s5u0, s5u1
37 to control USB port power rail for S3/S4/S5 sleep states.
38
Kyösti Mälkki10bdee12023-04-11 01:00:17 +030039config ACPI_CUSTOM_MADT
40 bool
41 default n if ACPI_NO_CUSTOM_MADT
42 default y
43 help
44 Selected by platforms that need to expose custom MADT entries.
45
46config ACPI_NO_CUSTOM_MADT
47 bool
48 default y if ACPI_COMMON_MADT_LAPIC && ACPI_COMMON_MADT_IOAPIC
49
Kyösti Mälkki69a13962023-04-08 14:10:48 +030050config ACPI_COMMON_MADT_LAPIC
51 bool
52
Kyösti Mälkki10bdee12023-04-11 01:00:17 +030053config ACPI_COMMON_MADT_IOAPIC
Kyösti Mälkkia5fa5342022-11-18 13:23:52 +020054 bool
Kyösti Mälkkia5fa5342022-11-18 13:23:52 +020055
Arthur Heymans3df6cc92023-06-27 16:44:59 +020056config ACPI_COMMON_MADT_GICC_V3
57 bool
58 depends on ARCH_ARM64
59
Furquan Shaikhbf4b7b02020-04-30 18:08:16 -070060config ACPI_NO_PCAT_8259
61 bool
Marshall Dawson6139a5c62017-10-04 15:10:00 -060062 help
Furquan Shaikhbf4b7b02020-04-30 18:08:16 -070063 Selected by platforms that don't expose a PC/AT 8259 PIC pair.
64
Rocky Phaguraeff07132021-01-10 15:42:50 -080065config ACPI_EINJ
66 def_bool n
67 depends on HAVE_ACPI_TABLES
68 help
69 This variable provides control for ACPI error injection table (EINJ)
70
Furquan Shaikhbf4b7b02020-04-30 18:08:16 -070071config HAVE_ACPI_TABLES
72 bool
73 help
74 This variable specifies whether a given board has ACPI table support.
75 It is usually set in mainboard/*/Kconfig.
Michael Niewöhnerf0a44ae2021-01-01 21:04:09 +010076
77config ACPI_LPIT
78 bool
79 depends on HAVE_ACPI_TABLES
80 help
81 Selected by platforms that support and fill Intel Low Power Idle Table.
Arthur Heymans2e3cb632023-06-30 15:01:08 +020082
83config ACPI_GTDT
84 bool
85 depends on HAVE_ACPI_TABLES
86 help
87 Selected by platforms that implement ARM generic timers
Arthur Heymansf3aa88a2023-06-22 21:41:51 +020088
Naresh Solanki6920c6f2023-09-13 12:01:58 +020089config ACPI_IORT
90 def_bool n
91 depends on ARCH_ARM64 && HAVE_ACPI_TABLES
92 help
93 Selected by platforms that implement ARM IO Remap table.
94
Arthur Heymansf3aa88a2023-06-22 21:41:51 +020095config MAX_ACPI_TABLE_SIZE_KB
96 int
97 default 144
98 help
99 Set the maximum size of all ACPI tables in KiB.
David Milosevicd9822742023-09-22 14:34:28 +0200100
101config ACPI_PPTT
102 bool
103 depends on HAVE_ACPI_TABLES
104 help
105 Selected to build an ACPI Processor Properties Topology Table.
106
107config ACPI_PPTT_MAX_CACHES
108 int
109 depends on ACPI_PPTT
110 default 4
111 help
112 This variable sets the maximum number of distinct caches per
113 topology level. Increasing this option also increases stack usage.