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Stefan Reinauereca92fb2006-08-23 14:28:37 +00001/*
Uwe Hermannc70e9fc2010-02-15 23:10:19 +00002 * This file is part of the coreboot project.
Stefan Reinauereca92fb2006-08-23 14:28:37 +00003 *
Stefan Reinauereca92fb2006-08-23 14:28:37 +00004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Stefan Reinauereca92fb2006-08-23 14:28:37 +000014 */
15
Uwe Hermannc70e9fc2010-02-15 23:10:19 +000016/*
17 * sdram_mode.h: Definitions for SDRAM Mode Register and Extended Mode Register
18 */
19
Stefan Reinauereca92fb2006-08-23 14:28:37 +000020#ifndef __SDRAMMODE_H_DEFINED
21#define __SDRAMMODE_H_DEFINED
22
23// SDRAM Mode Register definitions, per JESD79D
24// These are transmitted via A0-A13
25
26// Burst length
27#define SDRAM_BURST_2 (1<<0)
28#define SDRAM_BURST_4 (2<<0)
29#define SDRAM_BURST_8 (3<<0)
30
31#define SDRAM_BURST_SEQUENTIAL (0<<3)
32#define SDRAM_BURST_INTERLEAVED (1<<3)
33
34#define SDRAM_CAS_2_0 (2<<4)
35#define SDRAM_CAS_3_0 (3<<4) /* Optional for DDR 200-333 */
36#define SDRAM_CAS_1_5 (5<<4) /* Optional */
37#define SDRAM_CAS_2_5 (6<<4)
38#define SDRAM_CAS_MASK (7<<4)
39
40#define SDRAM_MODE_NORMAL (0 << 7)
41#define SDRAM_MODE_TEST (1 << 7)
42#define SDRAM_MODE_DLL_RESET (2 << 7)
43
44// Extended Mode Register
45
46#define SDRAM_EXTMODE_DLL_ENABLE (0 << 0)
47#define SDRAM_EXTMODE_DLL_DISABLE (1 << 0)
48
49#define SDRAM_EXTMODE_DRIVE_NORMAL (0 << 1)
50#define SDRAM_EXTMODE_DRIVE_WEAK (1 << 1) /* Optional */
51
Lee Leahy84d20d02017-03-07 15:00:18 -080052#endif // __SDRAMMODE_H_DEFINED