Iru Cai | 03e96a8 | 2017-01-26 14:51:47 +0800 | [diff] [blame] | 1 | # |
| 2 | # This file is part of the coreboot project. |
| 3 | # |
Iru Cai | 03e96a8 | 2017-01-26 14:51:47 +0800 | [diff] [blame] | 4 | # |
| 5 | # This program is free software; you can redistribute it and/or modify |
| 6 | # it under the terms of the GNU General Public License as published by |
| 7 | # the Free Software Foundation; either version 2 of the License, or |
| 8 | # (at your option) any later version. |
| 9 | # |
| 10 | # This program is distributed in the hope that it will be useful, |
| 11 | # but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | # GNU General Public License for more details. |
| 14 | # |
| 15 | |
| 16 | chip northbridge/intel/sandybridge |
| 17 | register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }" |
Iru Cai | 03e96a8 | 2017-01-26 14:51:47 +0800 | [diff] [blame] | 18 | register "gfx.ndid" = "3" |
| 19 | register "gfx.use_spread_spectrum_clock" = "1" |
| 20 | register "gpu_cpu_backlight" = "0x00000129" |
| 21 | register "gpu_dp_b_hotplug" = "4" |
| 22 | register "gpu_dp_c_hotplug" = "4" |
| 23 | register "gpu_dp_d_hotplug" = "4" |
| 24 | register "gpu_panel_port_select" = "0" |
| 25 | register "gpu_panel_power_backlight_off_delay" = "2000" |
| 26 | register "gpu_panel_power_backlight_on_delay" = "2000" |
| 27 | register "gpu_panel_power_cycle_delay" = "5" |
| 28 | register "gpu_panel_power_down_delay" = "230" |
| 29 | register "gpu_panel_power_up_delay" = "300" |
| 30 | register "gpu_pch_backlight" = "0x02880288" |
| 31 | device cpu_cluster 0x0 on |
Iru Cai | 03e96a8 | 2017-01-26 14:51:47 +0800 | [diff] [blame] | 32 | chip cpu/intel/model_206ax |
| 33 | register "c1_acpower" = "1" |
| 34 | register "c1_battery" = "1" |
| 35 | register "c2_acpower" = "3" |
| 36 | register "c2_battery" = "3" |
| 37 | register "c3_acpower" = "5" |
| 38 | register "c3_battery" = "5" |
Arthur Heymans | 7e6946a | 2019-01-21 17:55:02 +0100 | [diff] [blame] | 39 | device lapic 0x0 on end |
Arthur Heymans | b3f2323 | 2019-01-21 17:48:55 +0100 | [diff] [blame] | 40 | device lapic 0xacac off end |
Iru Cai | 03e96a8 | 2017-01-26 14:51:47 +0800 | [diff] [blame] | 41 | end |
| 42 | end |
| 43 | device domain 0x0 on |
Angel Pons | a0a3eab | 2020-01-01 20:52:11 +0100 | [diff] [blame] | 44 | |
Angel Pons | c97802f | 2020-01-01 21:27:43 +0100 | [diff] [blame] | 45 | device pci 00.0 on end # Host bridge |
Iru Cai | 03e96a8 | 2017-01-26 14:51:47 +0800 | [diff] [blame] | 46 | |
Angel Pons | 42d3005 | 2020-01-02 00:57:52 +0100 | [diff] [blame] | 47 | chip southbridge/intel/bd82x6x # Intel Cougar or Panther Point PCH |
Iru Cai | 03e96a8 | 2017-01-26 14:51:47 +0800 | [diff] [blame] | 48 | register "c2_latency" = "0x0065" |
Iru Cai | 03e96a8 | 2017-01-26 14:51:47 +0800 | [diff] [blame] | 49 | register "pcie_port_coalesce" = "1" |
| 50 | register "sata_interface_speed_support" = "0x3" |
Iru Cai | 03e96a8 | 2017-01-26 14:51:47 +0800 | [diff] [blame] | 51 | register "spi_uvscc" = "0x2005" |
| 52 | register "spi_lvscc" = "0" |
| 53 | |
Angel Pons | a0a3eab | 2020-01-01 20:52:11 +0100 | [diff] [blame] | 54 | device pci 16.0 on end # Management Engine Interface 1 |
| 55 | device pci 16.1 off end # Management Engine Interface 2 |
| 56 | device pci 16.2 off end # Management Engine IDE-R |
| 57 | device pci 16.3 off end # Management Engine KT |
| 58 | device pci 19.0 on end # Intel Gigabit Ethernet |
| 59 | device pci 1a.0 on end # USB2 EHCI #2 |
Angel Pons | c97802f | 2020-01-01 21:27:43 +0100 | [diff] [blame] | 60 | device pci 1b.0 on end # HD Audio controller |
Angel Pons | a0a3eab | 2020-01-01 20:52:11 +0100 | [diff] [blame] | 61 | device pci 1d.0 on end # USB2 EHCI #1 |
| 62 | device pci 1e.0 off end # PCI bridge |
Angel Pons | 42d3005 | 2020-01-02 00:57:52 +0100 | [diff] [blame] | 63 | device pci 1f.0 on end # LPC bridge |
Angel Pons | a0a3eab | 2020-01-01 20:52:11 +0100 | [diff] [blame] | 64 | device pci 1f.2 on end # SATA Controller 1 |
Angel Pons | 12197db | 2020-01-01 21:31:21 +0100 | [diff] [blame] | 65 | device pci 1f.3 on end # SMBus |
Angel Pons | a0a3eab | 2020-01-01 20:52:11 +0100 | [diff] [blame] | 66 | device pci 1f.5 off end # SATA Controller 2 |
| 67 | device pci 1f.6 off end # Thermal |
Iru Cai | 03e96a8 | 2017-01-26 14:51:47 +0800 | [diff] [blame] | 68 | end |
| 69 | end |
| 70 | end |