Patrick Georgi | afd4c87 | 2020-05-05 23:43:18 +0200 | [diff] [blame] | 1 | /* Memory information */ |
Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame] | 2 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Kane Chen | 33faac6 | 2014-07-27 12:54:44 -0700 | [diff] [blame] | 3 | |
| 4 | #ifndef _MEMORY_INFO_H_ |
| 5 | #define _MEMORY_INFO_H_ |
| 6 | |
Barnali Sarkar | c16d389 | 2017-02-23 16:56:54 +0530 | [diff] [blame] | 7 | #include <stdint.h> |
Patrick Rudolph | 5e00780 | 2020-07-27 15:37:43 +0200 | [diff] [blame] | 8 | #include <stdbool.h> |
Barnali Sarkar | c16d389 | 2017-02-23 16:56:54 +0530 | [diff] [blame] | 9 | |
Raul E Rangel | 99f54a6 | 2018-04-11 10:58:14 -0600 | [diff] [blame] | 10 | #define DIMM_INFO_SERIAL_SIZE 4 |
Aaron Durbin | 4b6f262 | 2018-10-09 07:31:24 -0600 | [diff] [blame] | 11 | #define DIMM_INFO_PART_NUMBER_SIZE 33 |
Richard Spiegel | bd65480 | 2018-02-22 10:03:39 -0700 | [diff] [blame] | 12 | #define DIMM_INFO_TOTAL 8 /* Maximum num of dimm is 8 */ |
| 13 | |
Raul E Rangel | 5041e9b | 2018-03-20 12:37:27 -0600 | [diff] [blame] | 14 | /** |
Kane Chen | 33faac6 | 2014-07-27 12:54:44 -0700 | [diff] [blame] | 15 | * If this table is filled and put in CBMEM, |
| 16 | * then these info in CBMEM will be used to generate smbios type 17 table |
Raul E Rangel | 5041e9b | 2018-03-20 12:37:27 -0600 | [diff] [blame] | 17 | * |
| 18 | * Values are specified according to the JEDEC SPD Standard. |
Kane Chen | 33faac6 | 2014-07-27 12:54:44 -0700 | [diff] [blame] | 19 | */ |
| 20 | struct dimm_info { |
Raul E Rangel | 5041e9b | 2018-03-20 12:37:27 -0600 | [diff] [blame] | 21 | /* |
| 22 | * Size of the module in MiB. |
| 23 | */ |
Kane Chen | 33faac6 | 2014-07-27 12:54:44 -0700 | [diff] [blame] | 24 | uint32_t dimm_size; |
Raul E Rangel | 5041e9b | 2018-03-20 12:37:27 -0600 | [diff] [blame] | 25 | /* |
| 26 | * SMBIOS (not SPD) device type. |
| 27 | * |
Elyes HAOUAS | 28114ae | 2018-11-14 17:51:00 +0100 | [diff] [blame] | 28 | * See the smbios.h smbios_memory_type enum. |
Raul E Rangel | 5041e9b | 2018-03-20 12:37:27 -0600 | [diff] [blame] | 29 | */ |
Kane Chen | 33faac6 | 2014-07-27 12:54:44 -0700 | [diff] [blame] | 30 | uint16_t ddr_type; |
Rob Barnes | 327f105 | 2020-09-01 10:26:57 -0600 | [diff] [blame] | 31 | /* |
| 32 | * ddr_frequency is deprecated. |
| 33 | * Use max_speed_mts and configured_speed_mts instead. |
| 34 | */ |
Kane Chen | 33faac6 | 2014-07-27 12:54:44 -0700 | [diff] [blame] | 35 | uint16_t ddr_frequency; |
| 36 | uint8_t rank_per_dimm; |
| 37 | uint8_t channel_num; |
| 38 | uint8_t dimm_num; |
| 39 | uint8_t bank_locator; |
Raul E Rangel | 5041e9b | 2018-03-20 12:37:27 -0600 | [diff] [blame] | 40 | /* |
Raul E Rangel | 99f54a6 | 2018-04-11 10:58:14 -0600 | [diff] [blame] | 41 | * SPD serial number. |
Raul E Rangel | 5041e9b | 2018-03-20 12:37:27 -0600 | [diff] [blame] | 42 | */ |
Richard Spiegel | bd65480 | 2018-02-22 10:03:39 -0700 | [diff] [blame] | 43 | uint8_t serial[DIMM_INFO_SERIAL_SIZE]; |
Raul E Rangel | 5041e9b | 2018-03-20 12:37:27 -0600 | [diff] [blame] | 44 | /* |
| 45 | * The last byte is '\0' for the end of string |
| 46 | * |
| 47 | * Must contain only printable ASCII. |
| 48 | */ |
Richard Spiegel | bd65480 | 2018-02-22 10:03:39 -0700 | [diff] [blame] | 49 | uint8_t module_part_number[DIMM_INFO_PART_NUMBER_SIZE]; |
Raul E Rangel | 5041e9b | 2018-03-20 12:37:27 -0600 | [diff] [blame] | 50 | /* |
| 51 | * SPD Manufacturer ID |
| 52 | */ |
Kane Chen | 33faac6 | 2014-07-27 12:54:44 -0700 | [diff] [blame] | 53 | uint16_t mod_id; |
Raul E Rangel | 5041e9b | 2018-03-20 12:37:27 -0600 | [diff] [blame] | 54 | /* |
| 55 | * SPD Module Type. |
| 56 | * |
| 57 | * See spd.h for valid values. |
| 58 | * |
| 59 | * e.g., SPD_RDIMM, SPD_SODIMM, SPD_MICRO_DIMM |
| 60 | */ |
Kane Chen | 33faac6 | 2014-07-27 12:54:44 -0700 | [diff] [blame] | 61 | uint8_t mod_type; |
Raul E Rangel | 5041e9b | 2018-03-20 12:37:27 -0600 | [diff] [blame] | 62 | /* |
| 63 | * SPD bus width. |
| 64 | * |
| 65 | * Bits 0 - 2 encode the primary bus width: |
| 66 | * 0b000 = 8 bit width |
| 67 | * 0b001 = 16 bit width |
| 68 | * 0b010 = 32 bit width |
| 69 | * 0b011 = 64 bit width |
| 70 | * |
| 71 | * Bits 3 - 4 encode the extension bits (ECC): |
| 72 | * 0b00 = 0 extension bits |
| 73 | * 0b01 = 8 bit of ECC |
| 74 | * |
| 75 | * e.g., |
| 76 | * 64 bit bus with 8 bits of ECC (72 bits total): 0b1011 |
| 77 | * 64 bit bus with 0 bits of ECC (64 bits total): 0b0011 |
| 78 | * |
| 79 | * See the smbios.h smbios_memory_bus_width enum. |
| 80 | */ |
Kane Chen | 33faac6 | 2014-07-27 12:54:44 -0700 | [diff] [blame] | 81 | uint8_t bus_width; |
Christian Walter | f972322 | 2019-05-28 10:37:24 +0200 | [diff] [blame] | 82 | /* |
| 83 | * Voltage Level |
| 84 | */ |
| 85 | uint16_t vdd_voltage; |
Rob Barnes | 327f105 | 2020-09-01 10:26:57 -0600 | [diff] [blame] | 86 | /* |
| 87 | * Max speed in MT/s |
| 88 | * If the value is 0, ddr_frequency should be used instead. |
| 89 | */ |
| 90 | uint16_t max_speed_mts; |
| 91 | /* |
| 92 | * Configured speed in MT/s |
| 93 | * If the value is 0, ddr_frequency should be used instead. |
| 94 | */ |
| 95 | uint16_t configured_speed_mts; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 96 | } __packed; |
Kane Chen | 33faac6 | 2014-07-27 12:54:44 -0700 | [diff] [blame] | 97 | |
| 98 | struct memory_info { |
Patrick Rudolph | 5e00780 | 2020-07-27 15:37:43 +0200 | [diff] [blame] | 99 | /* controller specific */ |
| 100 | bool ecc_capable; |
| 101 | /* Maximum capacity the DRAM controller/mainboard supports */ |
| 102 | uint32_t max_capacity_mib; |
| 103 | /* Maximum number of DIMMs the DRAM controller/mainboard supports */ |
| 104 | uint16_t number_of_devices; |
| 105 | |
| 106 | /* active DIMM configuration */ |
Kane Chen | 33faac6 | 2014-07-27 12:54:44 -0700 | [diff] [blame] | 107 | uint8_t dimm_cnt; |
Richard Spiegel | bd65480 | 2018-02-22 10:03:39 -0700 | [diff] [blame] | 108 | struct dimm_info dimm[DIMM_INFO_TOTAL]; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 109 | } __packed; |
Kane Chen | 33faac6 | 2014-07-27 12:54:44 -0700 | [diff] [blame] | 110 | |
Nick Vaccaro | 3b24bb6 | 2020-09-30 13:05:09 -0700 | [diff] [blame] | 111 | /* |
| 112 | * mainboard_get_dram_part_num returns a DRAM part number override string |
| 113 | * return NULL = no part number override provided by mainboard |
| 114 | * return non-NULL = pointer to a string terminating in '\0' |
| 115 | */ |
| 116 | const char *mainboard_get_dram_part_num(void); |
Kane Chen | 33faac6 | 2014-07-27 12:54:44 -0700 | [diff] [blame] | 117 | #endif |