CC Ma | 0c22084 | 2015-07-31 17:10:59 +0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2015 MediaTek Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | #include <arch/io.h> |
| 17 | #include <soc/mtcmos.h> |
| 18 | #include <soc/spm.h> |
| 19 | |
| 20 | enum { |
| 21 | SRAM_ISOINT_B = 1U << 6, |
| 22 | SRAM_CKISO = 1U << 5, |
| 23 | PWR_CLK_DIS = 1U << 4, |
| 24 | PWR_ON_2ND = 1U << 3, |
| 25 | PWR_ON = 1U << 2, |
| 26 | PWR_ISO = 1U << 1, |
| 27 | PWR_RST_B = 1U << 0 |
| 28 | }; |
| 29 | |
| 30 | enum { |
| 31 | SRAM_PDN = 0xf << 8, |
| 32 | DIS_SRAM_ACK = 0x1 << 12, |
| 33 | AUD_SRAM_ACK = 0xf << 12, |
| 34 | }; |
| 35 | |
| 36 | enum { |
| 37 | DIS_PWR_STA_MASK = 0x1 << 3, |
| 38 | AUD_PWR_STA_MASK = 0x1 << 24, |
| 39 | }; |
| 40 | |
| 41 | static void mtcmos_power_on(u32 *pwr_con, u32 pwr_sta_mask) |
| 42 | { |
| 43 | write32(&mt8173_spm->poweron_config_set, |
| 44 | (SPM_PROJECT_CODE << 16) | (1U << 0)); |
| 45 | |
| 46 | setbits_le32(pwr_con, PWR_ON); |
| 47 | setbits_le32(pwr_con, PWR_ON_2ND); |
| 48 | |
| 49 | while (!(read32(&mt8173_spm->pwr_status) & pwr_sta_mask) || |
| 50 | !(read32(&mt8173_spm->pwr_status_2nd) & pwr_sta_mask)) |
| 51 | continue; |
| 52 | |
| 53 | clrbits_le32(pwr_con, PWR_CLK_DIS); |
| 54 | clrbits_le32(pwr_con, PWR_ISO); |
| 55 | setbits_le32(pwr_con, PWR_RST_B); |
| 56 | clrbits_le32(pwr_con, SRAM_PDN); |
| 57 | } |
| 58 | |
| 59 | void mtcmos_audio_power_on(void) |
| 60 | { |
| 61 | mtcmos_power_on(&mt8173_spm->audio_pwr_con, AUD_PWR_STA_MASK); |
| 62 | while (read32(&mt8173_spm->audio_pwr_con) & AUD_SRAM_ACK) |
| 63 | continue; |
| 64 | } |
| 65 | |
| 66 | void mtcmos_display_power_on(void) |
| 67 | { |
| 68 | mtcmos_power_on(&mt8173_spm->dis_pwr_con, DIS_PWR_STA_MASK); |
| 69 | while (read32(&mt8173_spm->dis_pwr_con) & DIS_SRAM_ACK) |
| 70 | continue; |
| 71 | } |