Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2015 Google Inc. |
| 5 | * Copyright (C) 2015 Intel Corporation |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 15 | */ |
| 16 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 17 | #include <device/device.h> |
| 18 | #include <device/pci.h> |
| 19 | #include <device/pci_ids.h> |
| 20 | #include <stdlib.h> |
Aaron Durbin | e33a172 | 2015-07-30 16:52:56 -0500 | [diff] [blame] | 21 | #include <soc/iomap.h> |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 22 | #include <soc/pci_devs.h> |
| 23 | #include <soc/ramstage.h> |
| 24 | |
| 25 | static int pch_uart_is_debug(struct device *dev) |
| 26 | { |
Naveen Krishna Chatradhi | 5c56ce1 | 2015-07-15 16:02:25 +0530 | [diff] [blame] | 27 | return dev->path.pci.devfn == PCH_DEVFN_UART2; |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 28 | } |
| 29 | |
| 30 | static void pch_uart_read_resources(struct device *dev) |
| 31 | { |
| 32 | pci_dev_read_resources(dev); |
| 33 | |
| 34 | /* Set the configured UART base address for the debug port */ |
Aaron Durbin | e33a172 | 2015-07-30 16:52:56 -0500 | [diff] [blame] | 35 | if (IS_ENABLED(CONFIG_UART_DEBUG) && pch_uart_is_debug(dev)) { |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 36 | struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0); |
Aaron Durbin | e33a172 | 2015-07-30 16:52:56 -0500 | [diff] [blame] | 37 | /* Need to set the base and size for the resource allocator. */ |
| 38 | res->base = UART_DEBUG_BASE_ADDRESS; |
| 39 | res->size = UART_DEBUG_BASE_SIZE; |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 40 | res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | |
| 41 | IORESOURCE_FIXED; |
| 42 | } |
| 43 | } |
| 44 | |
| 45 | static struct device_operations device_ops = { |
| 46 | .read_resources = &pch_uart_read_resources, |
| 47 | .set_resources = &pci_dev_set_resources, |
| 48 | .enable_resources = &pci_dev_enable_resources, |
| 49 | .ops_pci = &soc_pci_ops, |
| 50 | }; |
| 51 | |
| 52 | static const unsigned short pci_device_ids[] = { |
| 53 | 0x9d27, /* UART0 */ |
| 54 | 0x9d28, /* UART1 */ |
| 55 | 0x9d66, /* UART2 */ |
Sooi, Li Cheng | c76e998 | 2017-01-04 13:36:06 +0800 | [diff] [blame] | 56 | 0xa127, /* KBL-H UART0 */ |
| 57 | 0xa128, /* KBL-H UART1 */ |
| 58 | 0xa166, /* KBL-H UART2 */ |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 59 | 0 |
| 60 | }; |
| 61 | |
| 62 | static const struct pci_driver pch_uart __pci_driver = { |
| 63 | .ops = &device_ops, |
| 64 | .vendor = PCI_VENDOR_ID_INTEL, |
| 65 | .devices = pci_device_ids, |
| 66 | }; |