| Subrata Banik | cb8849b | 2016-11-04 13:26:41 +0530 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2016 Intel Corporation. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | #include <device/device.h> |
| 17 | #include <device/pci.h> |
| 18 | #include <device/pci_def.h> |
| 19 | #include <device/pci_ids.h> |
| 20 | #include <soc/ramstage.h> |
| 21 | |
| 22 | static void *get_ahci_bar(void) |
| 23 | { |
| 24 | device_t dev = PCH_DEV_SATA; |
| 25 | uint32_t bar; |
| 26 | |
| 27 | bar = pci_read_config32(dev, PCI_BASE_ADDRESS_5); |
| 28 | |
| 29 | return (void *)(bar & ~PCI_BASE_ADDRESS_MEM_ATTR_MASK); |
| 30 | } |
| 31 | |
| 32 | /* |
| 33 | * SATA Port control and Status. By default, the SATA ports are set (by HW) |
| 34 | * to the disabled state (e.g. bits[3:0] == '0') as a result of an initial |
| 35 | * power on reset. When enabled by software as per SATA port mapping, |
| 36 | * the ports can transition between the on, partial and slumber states |
| 37 | * and can detect devices. When disabled, the port is in the off state and |
| 38 | * can't detect any devices. |
| 39 | */ |
| 40 | static void sata_final(device_t dev) |
| 41 | { |
| 42 | void *ahcibar = get_ahci_bar(); |
| 43 | u8 port_impl; |
| 44 | |
| 45 | dev = PCH_DEV_SATA; |
| 46 | /* Read Ports Implemented (GHC_PI) */ |
| 47 | port_impl = read32(ahcibar + 0x0c); |
| 48 | port_impl = ~port_impl & 0x07; |
| 49 | /* Port enable */ |
| 50 | pci_write_config8(dev, 0x92, port_impl); |
| 51 | } |
| 52 | |
| 53 | static struct device_operations sata_ops = { |
| 54 | .read_resources = &pci_dev_read_resources, |
| 55 | .set_resources = &pci_dev_set_resources, |
| 56 | .enable_resources = &pci_dev_enable_resources, |
| 57 | .final = sata_final, |
| 58 | .ops_pci = &soc_pci_ops, |
| 59 | }; |
| 60 | |
| 61 | static const unsigned short pci_device_ids[] = { |
| 62 | 0x9d03, /* SKL-U Base */ |
| 63 | 0x9d07, /* SKL-Y Premium, SKL-U Premium */ |
| 64 | 0xa282, /* KBL */ |
| 65 | 0 |
| 66 | }; |
| 67 | |
| 68 | static const struct pci_driver pch_sata __pci_driver = { |
| 69 | .ops = &sata_ops, |
| 70 | .vendor = PCI_VENDOR_ID_INTEL, |
| 71 | .devices = pci_device_ids, |
| 72 | }; |