blob: 4c92444060cb6a1bb62e23c09e2a128e99911d35 [file] [log] [blame]
Patrick Georgibe61a172010-12-18 07:48:43 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2008-2009 coresystems GmbH
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Patrick Georgibe61a172010-12-18 07:48:43 +000014 */
15
16#include <console/console.h>
17#include <device/device.h>
18#include <device/pci.h>
19#include <device/pci_ids.h>
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +010020#include <drivers/intel/gma/i915.h>
21#include "chip.h"
Patrick Georgibe61a172010-12-18 07:48:43 +000022
23static void gma_func0_init(struct device *dev)
24{
25 u32 reg32;
26
Uwe Hermann405721d2010-12-18 13:22:37 +000027 /* IGD needs to be bus master. */
Patrick Georgibe61a172010-12-18 07:48:43 +000028 reg32 = pci_read_config32(dev, PCI_COMMAND);
29 pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER);
30
31 pci_dev_init(dev);
32}
33
34static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
35{
36 if (!vendor || !device) {
37 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
Uwe Hermann405721d2010-12-18 13:22:37 +000038 pci_read_config32(dev, PCI_VENDOR_ID));
Patrick Georgibe61a172010-12-18 07:48:43 +000039 } else {
40 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
Uwe Hermann405721d2010-12-18 13:22:37 +000041 ((device & 0xffff) << 16) | (vendor & 0xffff));
Patrick Georgibe61a172010-12-18 07:48:43 +000042 }
43}
44
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +010045const struct i915_gpu_controller_info *
46intel_gma_get_controller_info(void)
47{
48 device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0));
49 if (!dev) {
50 return NULL;
51 }
Stefan Reinauer4bab6e72016-05-03 15:53:33 -070052 struct soc_intel_sch_config *chip = dev->chip_info;
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +010053 return &chip->gfx;
54}
55
Alexander Couzens5eea4582015-04-12 22:18:55 +020056static void gma_ssdt(device_t device)
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +010057{
58 const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
59 if (!gfx) {
60 return;
61 }
62
63 drivers_intel_gma_displays_ssdt_generate(gfx);
64}
65
Patrick Georgibe61a172010-12-18 07:48:43 +000066static struct pci_operations gma_pci_ops = {
Uwe Hermann405721d2010-12-18 13:22:37 +000067 .set_subsystem = gma_set_subsystem,
Patrick Georgibe61a172010-12-18 07:48:43 +000068};
69
70static struct device_operations gma_func0_ops = {
71 .read_resources = pci_dev_read_resources,
72 .set_resources = pci_dev_set_resources,
73 .enable_resources = pci_dev_enable_resources,
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +010074 .acpi_fill_ssdt_generator = gma_ssdt,
Patrick Georgibe61a172010-12-18 07:48:43 +000075 .init = gma_func0_init,
76 .scan_bus = 0,
77 .enable = 0,
78 .ops_pci = &gma_pci_ops,
79};
80
Patrick Georgibe61a172010-12-18 07:48:43 +000081static const struct pci_driver sch_gma_func0_driver __pci_driver = {
82 .ops = &gma_func0_ops,
83 .vendor = PCI_VENDOR_ID_INTEL,
84 .device = 0x8108,
85};