blob: 6c14ff0b677363aa8edc4fbbae95c4e9e18c70b1 [file] [log] [blame]
Barnali Sarkare13b7752017-02-21 16:24:49 +05301/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2017 Intel Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <smbios.h>
17#include "smbios.h"
18#include <string.h>
19#include <console/console.h>
20
21/* Fill the SMBIOS memory information from FSP MEM_INFO_DATA_HOB in CBMEM.*/
22void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type,
Barnali Sarkar6497cd92017-03-07 17:11:03 +053023 u32 frequency, u8 channel_id, u8 dimm_id,
24 const char *module_part_num, size_t module_part_number_size,
Barnali Sarkare13b7752017-02-21 16:24:49 +053025 u16 data_width)
26{
27 dimm->dimm_size = dimm_capacity;
28 dimm->ddr_type = ddr_type;
29 dimm->ddr_frequency = frequency;
30 dimm->channel_num = channel_id;
31 dimm->dimm_num = dimm_id;
32 strncpy((char *)dimm->module_part_number,
33 module_part_num,
Barnali Sarkar6497cd92017-03-07 17:11:03 +053034 min(sizeof(dimm->module_part_number),
35 module_part_number_size));
Barnali Sarkare13b7752017-02-21 16:24:49 +053036 switch (data_width) {
37 case 8:
38 dimm->bus_width = MEMORY_BUS_WIDTH_8;
39 break;
40 case 16:
41 dimm->bus_width = MEMORY_BUS_WIDTH_16;
42 break;
43 case 32:
44 dimm->bus_width = MEMORY_BUS_WIDTH_32;
45 break;
46 case 64:
47 dimm->bus_width = MEMORY_BUS_WIDTH_64;
48 break;
49 case 128:
50 dimm->bus_width = MEMORY_BUS_WIDTH_128;
51 break;
52 default:
53 printk(BIOS_ERR, "Incorrect DIMM Data width");
54 }
55}