Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2014 Google Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <console/console.h> |
| 17 | #include <device/device.h> |
| 18 | #include <device/pci.h> |
Julius Werner | 4ee4bd5 | 2014-10-20 13:46:39 -0700 | [diff] [blame] | 19 | #include <soc/pci_devs.h> |
| 20 | #include <soc/ramstage.h> |
| 21 | #include <soc/intel/broadwell/chip.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 22 | |
| 23 | static void pci_domain_set_resources(device_t dev) |
| 24 | { |
| 25 | assign_resources(dev->link_list); |
| 26 | } |
| 27 | |
| 28 | static struct device_operations pci_domain_ops = { |
| 29 | .read_resources = &pci_domain_read_resources, |
| 30 | .set_resources = &pci_domain_set_resources, |
| 31 | .scan_bus = &pci_domain_scan_bus, |
Marc Jones | a6354a1 | 2014-12-26 22:11:14 -0700 | [diff] [blame] | 32 | .ops_pci_bus = &pci_bus_default_ops, |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 33 | }; |
| 34 | |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 35 | static struct device_operations cpu_bus_ops = { |
Edward O'Callaghan | 0625a8b | 2014-10-31 08:03:16 +1100 | [diff] [blame] | 36 | .read_resources = DEVICE_NOOP, |
| 37 | .set_resources = DEVICE_NOOP, |
| 38 | .enable_resources = DEVICE_NOOP, |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 39 | .init = &broadwell_init_cpus, |
| 40 | }; |
| 41 | |
| 42 | static void broadwell_enable(device_t dev) |
| 43 | { |
| 44 | /* Set the operations if it is a special bus type */ |
| 45 | if (dev->path.type == DEVICE_PATH_DOMAIN) { |
| 46 | dev->ops = &pci_domain_ops; |
| 47 | } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { |
| 48 | dev->ops = &cpu_bus_ops; |
| 49 | } else if (dev->path.type == DEVICE_PATH_PCI) { |
| 50 | /* Handle PCH device enable */ |
| 51 | if (PCI_SLOT(dev->path.pci.devfn) > SA_DEV_SLOT_MINIHD && |
| 52 | (dev->ops == NULL || dev->ops->enable == NULL)) { |
| 53 | broadwell_pch_enable_dev(dev); |
| 54 | } |
| 55 | } |
| 56 | } |
| 57 | |
| 58 | struct chip_operations soc_intel_broadwell_ops = { |
| 59 | CHIP_NAME("Intel Broadwell") |
| 60 | .enable_dev = &broadwell_enable, |
| 61 | .init = &broadwell_init_pre_device, |
| 62 | }; |
| 63 | |
| 64 | static void pci_set_subsystem(device_t dev, unsigned vendor, unsigned device) |
| 65 | { |
| 66 | if (!vendor || !device) |
| 67 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
| 68 | pci_read_config32(dev, PCI_VENDOR_ID)); |
| 69 | else |
| 70 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
| 71 | (device << 16) | vendor); |
| 72 | } |
| 73 | |
| 74 | struct pci_operations broadwell_pci_ops = { |
| 75 | .set_subsystem = &pci_set_subsystem |
| 76 | }; |