Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2005 Yinghai Lu <yinghailu@gmail.com> |
| 5 | * Copyright (C) 2009 coresystems GmbH |
| 6 | * Copyright (C) 2013 Vladimir Serbinenko |
Frans Hendriks | e48be35 | 2019-06-19 11:01:27 +0200 | [diff] [blame] | 7 | * Copyright (C) 2018-2019 Eltan B.V. |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; version 2 of the License. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | */ |
| 18 | |
| 19 | #include <arch/io.h> |
Kyösti Mälkki | b5d998b | 2017-08-20 21:36:08 +0300 | [diff] [blame] | 20 | #include <console/console.h> |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 21 | #include <device/smbus_def.h> |
Elyes HAOUAS | ab89edb | 2019-05-15 21:10:44 +0200 | [diff] [blame] | 22 | #include <types.h> |
| 23 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 24 | #include "smbus.h" |
| 25 | |
| 26 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 27 | #if CONFIG(DEBUG_SMBUS) |
Kyösti Mälkki | b5d998b | 2017-08-20 21:36:08 +0300 | [diff] [blame] | 28 | #define dprintk(args...) printk(BIOS_DEBUG, ##args) |
| 29 | #else |
| 30 | #define dprintk(args...) do {} while (0) |
| 31 | #endif |
| 32 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 33 | /* I801 command constants */ |
| 34 | #define I801_QUICK (0 << 2) |
| 35 | #define I801_BYTE (1 << 2) |
| 36 | #define I801_BYTE_DATA (2 << 2) |
| 37 | #define I801_WORD_DATA (3 << 2) |
| 38 | #define I801_BLOCK_DATA (5 << 2) |
| 39 | #define I801_I2C_BLOCK_DATA (6 << 2) /* ICH5 and later */ |
| 40 | |
| 41 | /* I801 Host Control register bits */ |
| 42 | #define SMBHSTCNT_INTREN (1 << 0) |
| 43 | #define SMBHSTCNT_KILL (1 << 1) |
| 44 | #define SMBHSTCNT_LAST_BYTE (1 << 5) |
| 45 | #define SMBHSTCNT_START (1 << 6) |
| 46 | #define SMBHSTCNT_PEC_EN (1 << 7) /* ICH3 and later */ |
| 47 | |
| 48 | /* I801 Hosts Status register bits */ |
| 49 | #define SMBHSTSTS_BYTE_DONE (1 << 7) |
| 50 | #define SMBHSTSTS_INUSE_STS (1 << 6) |
| 51 | #define SMBHSTSTS_SMBALERT_STS (1 << 5) |
| 52 | #define SMBHSTSTS_FAILED (1 << 4) |
| 53 | #define SMBHSTSTS_BUS_ERR (1 << 3) |
| 54 | #define SMBHSTSTS_DEV_ERR (1 << 2) |
| 55 | #define SMBHSTSTS_INTR (1 << 1) |
| 56 | #define SMBHSTSTS_HOST_BUSY (1 << 0) |
| 57 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 58 | /* For SMBXMITADD register. */ |
| 59 | #define XMIT_WRITE(dev) (((dev) << 1) | 0) |
| 60 | #define XMIT_READ(dev) (((dev) << 1) | 1) |
| 61 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 62 | #define SMBUS_TIMEOUT (10 * 1000 * 100) |
Elyes HAOUAS | b0f1988 | 2018-06-09 11:59:00 +0200 | [diff] [blame] | 63 | #define SMBUS_BLOCK_MAXLEN 32 |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 64 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 65 | /* block_cmd_loop flags */ |
| 66 | #define BLOCK_READ 0 |
| 67 | #define BLOCK_WRITE (1 << 0) |
| 68 | #define BLOCK_I2C (1 << 1) |
| 69 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 70 | static void smbus_delay(void) |
| 71 | { |
| 72 | inb(0x80); |
| 73 | } |
| 74 | |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 75 | static void host_outb(unsigned int base, u8 reg, u8 value) |
| 76 | { |
| 77 | outb(value, base + reg); |
| 78 | } |
| 79 | |
| 80 | static u8 host_inb(unsigned int base, u8 reg) |
| 81 | { |
| 82 | return inb(base + reg); |
| 83 | } |
| 84 | |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 85 | static int host_completed(u8 status) |
| 86 | { |
| 87 | if (status & SMBHSTSTS_HOST_BUSY) |
| 88 | return 0; |
Kyösti Mälkki | 44206e3 | 2019-02-26 17:17:24 +0200 | [diff] [blame] | 89 | |
| 90 | /* These status bits do not imply completion of transaction. */ |
| 91 | status &= ~(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INUSE_STS | |
| 92 | SMBHSTSTS_SMBALERT_STS); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 93 | return status != 0; |
| 94 | } |
| 95 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 96 | static int recover_master(int smbus_base, int ret) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 97 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 98 | /* TODO: Depending of the failure, drive KILL transaction |
| 99 | * or force soft reset on SMBus master controller. |
| 100 | */ |
| 101 | printk(BIOS_ERR, "SMBus: Fatal master timeout (%d)\n", ret); |
| 102 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 103 | } |
| 104 | |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 105 | static int cb_err_from_stat(u8 status) |
| 106 | { |
Kyösti Mälkki | 44206e3 | 2019-02-26 17:17:24 +0200 | [diff] [blame] | 107 | /* These status bits do not imply errors. */ |
| 108 | status &= ~(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INUSE_STS | |
| 109 | SMBHSTSTS_SMBALERT_STS); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 110 | |
| 111 | if (status == SMBHSTSTS_INTR) |
| 112 | return 0; |
| 113 | |
| 114 | return SMBUS_ERROR; |
| 115 | } |
| 116 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 117 | static int setup_command(unsigned int smbus_base, u8 ctrl, u8 xmitadd) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 118 | { |
| 119 | unsigned int loops = SMBUS_TIMEOUT; |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 120 | u8 host_busy; |
| 121 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 122 | do { |
| 123 | smbus_delay(); |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 124 | host_busy = host_inb(smbus_base, SMBHSTSTAT) & SMBHSTSTS_HOST_BUSY; |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 125 | } while (--loops && host_busy); |
| 126 | |
| 127 | if (loops == 0) |
| 128 | return recover_master(smbus_base, |
| 129 | SMBUS_WAIT_UNTIL_READY_TIMEOUT); |
| 130 | |
| 131 | /* Clear any lingering errors, so the transaction will run. */ |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 132 | host_outb(smbus_base, SMBHSTSTAT, host_inb(smbus_base, SMBHSTSTAT)); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 133 | |
| 134 | /* Set up transaction */ |
| 135 | /* Disable interrupts */ |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 136 | host_outb(smbus_base, SMBHSTCTL, ctrl); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 137 | |
| 138 | /* Set the device I'm talking to. */ |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 139 | host_outb(smbus_base, SMBXMITADD, xmitadd); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 140 | |
| 141 | return 0; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 142 | } |
| 143 | |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 144 | static int execute_command(unsigned int smbus_base) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 145 | { |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 146 | unsigned int loops = SMBUS_TIMEOUT; |
| 147 | u8 status; |
| 148 | |
| 149 | /* Start the command. */ |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 150 | host_outb(smbus_base, SMBHSTCTL, host_inb(smbus_base, SMBHSTCTL) | SMBHSTCNT_START); |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 151 | |
| 152 | /* Poll for it to start. */ |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 153 | do { |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 154 | smbus_delay(); |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 155 | |
| 156 | /* If we poll too slow, we could miss HOST_BUSY flag |
| 157 | * set and detect INTR or x_ERR flags instead here. |
| 158 | */ |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 159 | status = host_inb(smbus_base, SMBHSTSTAT); |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 160 | status &= ~(SMBHSTSTS_SMBALERT_STS | SMBHSTSTS_INUSE_STS); |
| 161 | } while (--loops && status == 0); |
| 162 | |
| 163 | if (loops == 0) |
| 164 | return recover_master(smbus_base, |
| 165 | SMBUS_WAIT_UNTIL_ACTIVE_TIMEOUT); |
| 166 | |
| 167 | return 0; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 168 | } |
| 169 | |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 170 | static int complete_command(unsigned int smbus_base) |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 171 | { |
| 172 | unsigned int loops = SMBUS_TIMEOUT; |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 173 | u8 status; |
| 174 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 175 | do { |
| 176 | smbus_delay(); |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 177 | status = host_inb(smbus_base, SMBHSTSTAT); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 178 | } while (--loops && !host_completed(status)); |
| 179 | |
| 180 | if (loops == 0) |
| 181 | return recover_master(smbus_base, |
| 182 | SMBUS_WAIT_UNTIL_DONE_TIMEOUT); |
| 183 | |
| 184 | return cb_err_from_stat(status); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 185 | } |
| 186 | |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 187 | static int smbus_read_cmd(unsigned int smbus_base, u8 ctrl, u8 device, |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 188 | unsigned int address) |
| 189 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 190 | int ret; |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 191 | u16 word; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 192 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 193 | /* Set up for a byte data read. */ |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 194 | ret = setup_command(smbus_base, ctrl, XMIT_READ(device)); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 195 | if (ret < 0) |
| 196 | return ret; |
| 197 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 198 | /* Set the command/address... */ |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 199 | host_outb(smbus_base, SMBHSTCMD, address); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 200 | |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 201 | /* Clear the data bytes... */ |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 202 | host_outb(smbus_base, SMBHSTDAT0, 0); |
| 203 | host_outb(smbus_base, SMBHSTDAT1, 0); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 204 | |
| 205 | /* Start the command */ |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 206 | ret = execute_command(smbus_base); |
| 207 | if (ret < 0) |
| 208 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 209 | |
| 210 | /* Poll for transaction completion */ |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 211 | ret = complete_command(smbus_base); |
| 212 | if (ret < 0) |
| 213 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 214 | |
| 215 | /* Read results of transaction */ |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 216 | word = host_inb(smbus_base, SMBHSTDAT0); |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 217 | if (ctrl == I801_WORD_DATA) |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 218 | word |= host_inb(smbus_base, SMBHSTDAT1) << 8; |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 219 | |
| 220 | return word; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 221 | } |
| 222 | |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 223 | static int smbus_write_cmd(unsigned int smbus_base, u8 ctrl, u8 device, |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 224 | unsigned int address, unsigned int data) |
| 225 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 226 | int ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 227 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 228 | /* Set up for a byte data write. */ |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 229 | ret = setup_command(smbus_base, ctrl, XMIT_WRITE(device)); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 230 | if (ret < 0) |
| 231 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 232 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 233 | /* Set the command/address... */ |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 234 | host_outb(smbus_base, SMBHSTCMD, address); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 235 | |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 236 | /* Set the data bytes... */ |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 237 | host_outb(smbus_base, SMBHSTDAT0, data & 0xff); |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 238 | if (ctrl == I801_WORD_DATA) |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 239 | host_outb(smbus_base, SMBHSTDAT1, data >> 8); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 240 | |
| 241 | /* Start the command */ |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 242 | ret = execute_command(smbus_base); |
| 243 | if (ret < 0) |
| 244 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 245 | |
| 246 | /* Poll for transaction completion */ |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 247 | return complete_command(smbus_base); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 248 | } |
| 249 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 250 | static int block_cmd_loop(unsigned int smbus_base, |
| 251 | u8 *buf, const unsigned int max_bytes, int flags) |
| 252 | { |
| 253 | u8 status; |
| 254 | unsigned int loops = SMBUS_TIMEOUT; |
| 255 | int ret, bytes = 0; |
| 256 | int is_write_cmd = flags & BLOCK_WRITE; |
| 257 | int sw_drives_nak = flags & BLOCK_I2C; |
| 258 | |
| 259 | /* Hardware limitations. */ |
| 260 | if (flags == (BLOCK_WRITE | BLOCK_I2C)) |
| 261 | return SMBUS_ERROR; |
| 262 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 263 | /* Set number of bytes to transfer. */ |
| 264 | /* Reset number of bytes to transfer so we notice later it |
| 265 | * was really updated with the transaction. */ |
| 266 | if (!sw_drives_nak) { |
| 267 | if (is_write_cmd) |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 268 | host_outb(smbus_base, SMBHSTDAT0, max_bytes); |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 269 | else |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 270 | host_outb(smbus_base, SMBHSTDAT0, 0); |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 271 | } |
| 272 | |
| 273 | /* Send first byte from buffer, bytes_sent increments after |
| 274 | * hardware acknowledges it. |
| 275 | */ |
| 276 | if (is_write_cmd) |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 277 | host_outb(smbus_base, SMBBLKDAT, *buf++); |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 278 | |
| 279 | /* Start the command */ |
| 280 | ret = execute_command(smbus_base); |
| 281 | if (ret < 0) |
| 282 | return ret; |
| 283 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 284 | /* Poll for transaction completion */ |
| 285 | do { |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 286 | status = host_inb(smbus_base, SMBHSTSTAT); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 287 | |
| 288 | if (status & SMBHSTSTS_BYTE_DONE) { /* Byte done */ |
| 289 | |
| 290 | if (is_write_cmd) { |
| 291 | bytes++; |
| 292 | if (bytes < max_bytes) |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 293 | host_outb(smbus_base, SMBBLKDAT, *buf++); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 294 | } else { |
| 295 | if (bytes < max_bytes) |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 296 | *buf++ = host_inb(smbus_base, SMBBLKDAT); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 297 | bytes++; |
| 298 | |
| 299 | /* Indicate that next byte is the last one. */ |
| 300 | if (sw_drives_nak && (bytes + 1 >= max_bytes)) { |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 301 | host_outb(smbus_base, SMBHSTCTL, |
| 302 | host_inb(smbus_base, SMBHSTCTL) | |
| 303 | SMBHSTCNT_LAST_BYTE); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 304 | } |
| 305 | |
| 306 | } |
| 307 | |
| 308 | /* Engine internally completes the transaction |
| 309 | * and clears HOST_BUSY flag once the byte count |
| 310 | * has been reached or LAST_BYTE was set. |
| 311 | */ |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 312 | host_outb(smbus_base, SMBHSTSTAT, SMBHSTSTS_BYTE_DONE); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 313 | } |
| 314 | |
| 315 | } while (--loops && !host_completed(status)); |
| 316 | |
| 317 | dprintk("%s: status = %02x, len = %d / %d, loops = %d\n", |
| 318 | __func__, status, bytes, max_bytes, SMBUS_TIMEOUT - loops); |
| 319 | |
| 320 | if (loops == 0) |
| 321 | return recover_master(smbus_base, |
| 322 | SMBUS_WAIT_UNTIL_DONE_TIMEOUT); |
| 323 | |
| 324 | ret = cb_err_from_stat(status); |
| 325 | if (ret < 0) |
| 326 | return ret; |
| 327 | |
| 328 | return bytes; |
| 329 | } |
| 330 | |
Kyösti Mälkki | 7ca19b2 | 2020-01-02 17:02:54 +0200 | [diff] [blame] | 331 | int do_smbus_read_byte(unsigned int smbus_base, u8 device, unsigned int address) |
| 332 | { |
| 333 | return smbus_read_cmd(smbus_base, I801_BYTE_DATA, device, address); |
| 334 | } |
| 335 | |
| 336 | int do_smbus_read_word(unsigned int smbus_base, u8 device, unsigned int address) |
| 337 | { |
| 338 | return smbus_read_cmd(smbus_base, I801_WORD_DATA, device, address); |
| 339 | } |
| 340 | |
| 341 | int do_smbus_write_byte(unsigned int smbus_base, u8 device, unsigned int address, |
| 342 | unsigned int data) |
| 343 | { |
| 344 | return smbus_write_cmd(smbus_base, I801_BYTE_DATA, device, address, data); |
| 345 | } |
| 346 | |
| 347 | int do_smbus_write_word(unsigned int smbus_base, u8 device, unsigned int address, |
| 348 | unsigned int data) |
| 349 | { |
| 350 | return smbus_write_cmd(smbus_base, I801_WORD_DATA, device, address, data); |
| 351 | } |
| 352 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 353 | int do_smbus_block_read(unsigned int smbus_base, u8 device, u8 cmd, |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 354 | unsigned int max_bytes, u8 *buf) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 355 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 356 | int ret, slave_bytes; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 357 | |
Kyösti Mälkki | c17e855 | 2017-08-20 23:48:23 +0300 | [diff] [blame] | 358 | max_bytes = MIN(SMBUS_BLOCK_MAXLEN, max_bytes); |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 359 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 360 | /* Set up for a block data read. */ |
| 361 | ret = setup_command(smbus_base, I801_BLOCK_DATA, XMIT_READ(device)); |
| 362 | if (ret < 0) |
| 363 | return ret; |
| 364 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 365 | /* Set the command/address... */ |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 366 | host_outb(smbus_base, SMBHSTCMD, cmd); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 367 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 368 | /* Execute block transaction. */ |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 369 | ret = block_cmd_loop(smbus_base, buf, max_bytes, BLOCK_READ); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 370 | if (ret < 0) |
| 371 | return ret; |
| 372 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 373 | /* Post-check we received complete message. */ |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 374 | slave_bytes = host_inb(smbus_base, SMBHSTDAT0); |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 375 | if (ret < slave_bytes) |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 376 | return SMBUS_ERROR; |
| 377 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 378 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 379 | } |
| 380 | |
| 381 | int do_smbus_block_write(unsigned int smbus_base, u8 device, u8 cmd, |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 382 | const unsigned int bytes, const u8 *buf) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 383 | { |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 384 | int ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 385 | |
Kyösti Mälkki | c17e855 | 2017-08-20 23:48:23 +0300 | [diff] [blame] | 386 | if (bytes > SMBUS_BLOCK_MAXLEN) |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 387 | return SMBUS_ERROR; |
| 388 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 389 | /* Set up for a block data write. */ |
| 390 | ret = setup_command(smbus_base, I801_BLOCK_DATA, XMIT_WRITE(device)); |
| 391 | if (ret < 0) |
| 392 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 393 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 394 | /* Set the command/address... */ |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 395 | host_outb(smbus_base, SMBHSTCMD, cmd); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 396 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 397 | /* Execute block transaction. */ |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 398 | ret = block_cmd_loop(smbus_base, (u8 *)buf, bytes, BLOCK_WRITE); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 399 | if (ret < 0) |
| 400 | return ret; |
| 401 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 402 | if (ret < bytes) |
Kyösti Mälkki | c17e855 | 2017-08-20 23:48:23 +0300 | [diff] [blame] | 403 | return SMBUS_ERROR; |
| 404 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 405 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 406 | } |
| 407 | |
| 408 | /* Only since ICH5 */ |
Kyösti Mälkki | c01a505 | 2019-01-30 09:39:23 +0200 | [diff] [blame] | 409 | static int has_i2c_read_command(void) |
| 410 | { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 411 | if (CONFIG(SOUTHBRIDGE_INTEL_I82371EB) || |
| 412 | CONFIG(SOUTHBRIDGE_INTEL_I82801DX)) |
Kyösti Mälkki | c01a505 | 2019-01-30 09:39:23 +0200 | [diff] [blame] | 413 | return 0; |
| 414 | return 1; |
| 415 | } |
| 416 | |
| 417 | int do_i2c_eeprom_read(unsigned int smbus_base, u8 device, |
Kyösti Mälkki | 1e39236 | 2017-08-20 21:36:03 +0300 | [diff] [blame] | 418 | unsigned int offset, const unsigned int bytes, u8 *buf) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 419 | { |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 420 | int ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 421 | |
Kyösti Mälkki | c01a505 | 2019-01-30 09:39:23 +0200 | [diff] [blame] | 422 | if (!has_i2c_read_command()) |
| 423 | return SMBUS_ERROR; |
| 424 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 425 | /* Set up for a i2c block data read. |
| 426 | * |
| 427 | * FIXME: Address parameter changes to XMIT_READ(device) with |
| 428 | * some revision of PCH. Presumably hardware revisions that |
| 429 | * do not have i2c block write support internally set LSB. |
| 430 | */ |
| 431 | ret = setup_command(smbus_base, I801_I2C_BLOCK_DATA, |
| 432 | XMIT_WRITE(device)); |
| 433 | if (ret < 0) |
| 434 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 435 | |
| 436 | /* device offset */ |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 437 | host_outb(smbus_base, SMBHSTDAT1, offset); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 438 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 439 | /* Execute block transaction. */ |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 440 | ret = block_cmd_loop(smbus_base, buf, bytes, BLOCK_READ | BLOCK_I2C); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 441 | if (ret < 0) |
| 442 | return ret; |
| 443 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 444 | /* Post-check we received complete message. */ |
| 445 | if (ret < bytes) |
Kyösti Mälkki | 1e39236 | 2017-08-20 21:36:03 +0300 | [diff] [blame] | 446 | return SMBUS_ERROR; |
| 447 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 448 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 449 | } |
Frans Hendriks | e48be35 | 2019-06-19 11:01:27 +0200 | [diff] [blame] | 450 | |
| 451 | /* |
| 452 | * The caller is responsible of settings HOSTC I2C_EN bit prior to making this |
| 453 | * call! |
| 454 | */ |
| 455 | int do_i2c_block_write(unsigned int smbus_base, u8 device, |
| 456 | unsigned int bytes, u8 *buf) |
| 457 | { |
| 458 | u8 cmd; |
| 459 | int ret; |
| 460 | |
| 461 | if (!CONFIG(SOC_INTEL_BRASWELL)) |
| 462 | return SMBUS_ERROR; |
| 463 | |
| 464 | if (!bytes || (bytes > SMBUS_BLOCK_MAXLEN)) |
| 465 | return SMBUS_ERROR; |
| 466 | |
| 467 | /* Set up for a block data write. */ |
| 468 | ret = setup_command(smbus_base, I801_BLOCK_DATA, XMIT_WRITE(device)); |
| 469 | if (ret < 0) |
| 470 | return ret; |
| 471 | |
| 472 | /* |
| 473 | * In i2c mode SMBus controller sequence on bus will be: |
| 474 | * <SMBXINTADD> <SMBHSTDAT1> <SMBBLKDAT> .. <SMBBLKDAT> |
| 475 | * The SMBHSTCMD must be written also to ensure the SMBUs controller |
| 476 | * will generate the i2c sequence. |
| 477 | */ |
| 478 | cmd = *buf++; |
| 479 | bytes--; |
Kyösti Mälkki | b49638d | 2020-01-02 16:36:56 +0200 | [diff] [blame^] | 480 | host_outb(smbus_base, SMBHSTCMD, cmd); |
| 481 | host_outb(smbus_base, SMBHSTDAT1, cmd); |
Frans Hendriks | e48be35 | 2019-06-19 11:01:27 +0200 | [diff] [blame] | 482 | |
| 483 | /* Execute block transaction. */ |
| 484 | ret = block_cmd_loop(smbus_base, buf, bytes, BLOCK_WRITE); |
| 485 | if (ret < 0) |
| 486 | return ret; |
| 487 | |
| 488 | if (ret < bytes) |
| 489 | return SMBUS_ERROR; |
| 490 | |
| 491 | ret++; /* 1st byte has been written using SMBHSTDAT1 */ |
| 492 | return ret; |
| 493 | } |