blob: 1dd8b980e3a0ba400fb589c36ddc29ab55571403 [file] [log] [blame]
Simon Zhou3b821312023-05-22 18:52:38 +08001/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <chip.h>
4#include <fw_config.h>
5#include <baseboard/variants.h>
YH Linfd6908a2023-08-31 09:41:31 -07006#include <sar.h>
7
8const char *get_wifi_sar_cbfs_filename(void)
9{
10 return get_wifi_sar_fw_config_filename(FW_CONFIG_FIELD(WIFI_SAR_ID));
11}
Simon Zhou3b821312023-05-22 18:52:38 +080012
13void variant_update_soc_chip_config(struct soc_intel_meteorlake_config *config)
14{
Kapil Porwal642b7892023-09-11 05:37:28 +000015 if (fw_config_probe(FW_CONFIG(AUDIO, ALC1019_ALC5682I_I2S)))
16 config->cnvi_bt_audio_offload = true;
17
Simon Zhou3b821312023-05-22 18:52:38 +080018 /* SOC Aux orientation override:
19 * This is a bitfield that corresponds to up to 4 TCSS ports.
20 * Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2.
21 * TcssAuxOri = 0101b
22 * Bit0,Bit2 set to "1" indicates no retimer on USBC Ports
23 * Bit1,Bit3 set to "0" indicates Aux lines are not swapped on the
24 * motherboard to USBC connector
25 */
26 if (fw_config_probe(FW_CONFIG(MB_CONFIG, MB_TYPEC))) {
27 config->typec_aux_bias_pads[1].pad_auxp_dc = GPP_C16;
28 config->typec_aux_bias_pads[1].pad_auxn_dc = GPP_C17;
29 config->tcss_aux_ori = 0x04;
30 }
31}