| Furquan Shaikh | 62d1343 | 2020-05-04 22:50:57 -0700 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* This file is part of the coreboot project. */ |
| 3 | |
| 4 | #ifndef __ESPI_H__ |
| 5 | #define __ESPI_H__ |
| 6 | |
| 7 | /* ESPI Slave Registers (Document # 327432-004 Revision 1.0 Chapter 7) */ |
| 8 | |
| 9 | #define ESPI_SLAVE_DEVICE_ID 0x04 |
| 10 | #define ESPI_SLAVE_VERSION_ID_SHIFT 0 |
| 11 | #define ESPI_SLAVE_VERSION_ID_MASK 0xf |
| 12 | |
| 13 | #define ESPI_SLAVE_GENERAL_CFG 0x08 |
| 14 | #define ESPI_SLAVE_CRC_ENABLE (1 << 31) |
| 15 | #define ESPI_SLAVE_CRC_DISABLE (0 << 31) |
| 16 | #define ESPI_SLAVE_RESP_MOD_ENABLE (1 << 30) |
| 17 | #define ESPI_SLAVE_RESP_MOD_DISABLE (0 << 30) |
| 18 | #define ESPI_SLAVE_ALERT_MODE_PIN (1 << 28) |
| 19 | #define ESPI_SLAVE_ALERT_MODE_IO1 (0 << 28) |
| 20 | #define ESPI_SLAVE_IO_MODE_SEL_SHIFT 26 |
| 21 | #define ESPI_SLAVE_IO_MODE_SEL_MASK (0x3 << ESPI_SLAVE_IO_MODE_SEL_SHIFT) |
| 22 | #define ESPI_SLAVE_IO_MODE_SEL_VAL(x) ((x) << ESPI_SLAVE_IO_MODE_SEL_SHIFT) |
| 23 | #define ESPI_SLAVE_IO_MODE_SEL_SINGLE ESPI_SLAVE_IO_MODE_SEL_VAL(0) |
| 24 | #define ESPI_SLAVE_IO_MODE_SEL_DUAL ESPI_SLAVE_IO_MODE_SEL_VAL(1) |
| 25 | #define ESPI_SLAVE_IO_MODE_SEL_QUAD ESPI_SLAVE_IO_MODE_SEL_VAL(2) |
| 26 | #define ESPI_SLAVE_IO_MODE_SUPP_SHIFT 24 |
| 27 | #define ESPI_SLAVE_IO_MODE_SUPP_MASK (0x3 << ESPI_SLAVE_IO_MODE_SUPP_SHIFT) |
| 28 | #define ESPI_SLAVE_IO_MODE_SUPP_VAL(x) ((x) << ESPI_SLAVE_IO_MODE_SUPP_SHIFT) |
| 29 | #define ESPI_SLAVE_IO_MODE_SUPP_SINGLE_ONLY ESPI_SLAVE_IO_MODE_SUPP_VAL(0) |
| 30 | #define ESPI_SLAVE_IO_MODE_SUPP_SINGLE_DUAL ESPI_SLAVE_IO_MODE_SUPP_VAL(1) |
| 31 | #define ESPI_SLAVE_IO_MODE_SUPP_SINGLE_QUAD ESPI_SLAVE_IO_MODE_SUPP_VAL(2) |
| 32 | #define ESPI_SLAVE_IO_MODE_SUPP_SINGLE_DUAL_QUAD ESPI_SLAVE_IO_MODE_SUPP_VAL(3) |
| 33 | #define ESPI_SLAVE_OPEN_DRAIN_ALERT_SEL (1 << 23) |
| 34 | #define ESPI_SLAVE_PUSH_PULL_ALERT_SEL (0 << 23) |
| 35 | #define ESPI_SLAVE_OP_FREQ_SEL_SHIFT 20 |
| 36 | #define ESPI_SLAVE_OP_FREQ_SEL_MASK (0x7 << ESPI_SLAVE_OP_FREQ_SEL_SHIFT) |
| 37 | #define ESPI_SLAVE_OP_FREQ_SEL_VAL(x) ((x) << ESPI_SLAVE_OP_FREQ_SEL_SHIFT) |
| 38 | #define ESPI_SLAVE_OP_FREQ_SEL_20_MHZ ESPI_SLAVE_OP_FREQ_SEL_VAL(0) |
| 39 | #define ESPI_SLAVE_OP_FREQ_SEL_25_MHZ ESPI_SLAVE_OP_FREQ_SEL_VAL(1) |
| 40 | #define ESPI_SLAVE_OP_FREQ_SEL_33_MHZ ESPI_SLAVE_OP_FREQ_SEL_VAL(2) |
| 41 | #define ESPI_SLAVE_OP_FREQ_SEL_50_MHZ ESPI_SLAVE_OP_FREQ_SEL_VAL(3) |
| 42 | #define ESPI_SLAVE_OP_FREQ_SEL_66_MHZ ESPI_SLAVE_OP_FREQ_SEL_VAL(4) |
| 43 | #define ESPI_SLAVE_OPEN_DRAIN_ALERT_SUPP (1 << 19) |
| 44 | #define ESPI_SLAVE_OP_FREQ_SUPP_SHIFT 16 |
| 45 | #define ESPI_SLAVE_OP_FREQ_SUPP_MASK (0x7 << ESPI_SLAVE_OP_FREQ_SUPP_SHIFT) |
| 46 | #define ESPI_SLAVE_OP_FREQ_SUPP_VAL(x) ((x) << ESPI_SLAVE_OP_FREQ_SUPP_SHIFT) |
| 47 | #define ESPI_SLAVE_OP_FREQ_SUPP_20_MHZ ESPI_SLAVE_OP_FREQ_SUPP_VAL(0) |
| 48 | #define ESPI_SLAVE_OP_FREQ_SUPP_25_MHZ ESPI_SLAVE_OP_FREQ_SUPP_VAL(1) |
| 49 | #define ESPI_SLAVE_OP_FREQ_SUPP_33_MHZ ESPI_SLAVE_OP_FREQ_SUPP_VAL(2) |
| 50 | #define ESPI_SLAVE_OP_FREQ_SUPP_50_MHZ ESPI_SLAVE_OP_FREQ_SUPP_VAL(3) |
| 51 | #define ESPI_SLAVE_OP_FREQ_SUPP_66_MHZ ESPI_SLAVE_OP_FREQ_SUPP_VAL(4) |
| 52 | #define ESPI_SLAVE_MAX_WAIT_SHIFT 12 |
| 53 | #define ESPI_SLAVE_MAX_WAIT_MASK (0xf << ESPI_SLAVE_MAX_WAIT_SHIFT) |
| 54 | #define ESPI_SLAVE_MAX_WAIT_STATE(x) \ |
| 55 | (((x) << ESPI_SLAVE_MAX_WAIT_SHIFT) & ESPI_MAX_WAIT_MASK) |
| 56 | #define ESPI_SLAVE_FLASH_CH_SUPP (1 << 3) |
| 57 | #define ESPI_SLAVE_OOB_CH_SUPP (1 << 2) |
| 58 | #define ESPI_SLAVE_VW_CH_SUPP (1 << 1) |
| 59 | #define ESPI_SLAVE_PERIPH_CH_SUPP (1 << 0) |
| 60 | |
| 61 | #define ESPI_SLAVE_PERIPH_CFG 0x10 |
| 62 | #define ESPI_SLAVE_PERIPH_MAX_READ_SIZE_SHIFT 12 |
| 63 | #define ESPI_SLAVE_PERIPH_MAX_READ_SIZE_MASK \ |
| 64 | (0x7 << ESPI_SLAVE_PERIPH_MAX_READ_SIZE_SHIFT) |
| 65 | #define ESPI_SLAVE_PERIPH_MAX_READ_SIZE_VAL(x) \ |
| 66 | ((x) << ESPI_SLAVE_PERIPH_MAX_READ_SIZE_SHIFT) |
| 67 | #define ESPI_SLAVE_PERIPH_MAX_READ_64B ESPI_SLAVE_PERIPH_MAX_READ_SIZE_VAL(1) |
| 68 | #define ESPI_SLAVE_PERIPH_MAX_READ_128B ESPI_SLAVE_PERIPH_MAX_READ_SIZE_VAL(2) |
| 69 | #define ESPI_SLAVE_PERIPH_MAX_READ_256B ESPI_SLAVE_PERIPH_MAX_READ_SIZE_VAL(3) |
| 70 | #define ESPI_SLAVE_PERIPH_MAX_READ_512B ESPI_SLAVE_PERIPH_MAX_READ_SIZE_VAL(4) |
| 71 | #define ESPI_SLAVE_PERIPH_MAX_READ_1024B ESPI_SLAVE_PERIPH_MAX_READ_SIZE_VAL(5) |
| 72 | #define ESPI_SLAVE_PERIPH_MAX_READ_2048B ESPI_SLAVE_PERIPH_MAX_READ_SIZE_VAL(6) |
| 73 | #define ESPI_SLAVE_PERIPH_MAX_READ_4096B ESPI_SLAVE_PERIPH_MAX_READ_SIZE_VAL(7) |
| 74 | #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_SHIFT 8 |
| 75 | #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_MASK \ |
| 76 | (0x7 << ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_SHIFT) |
| 77 | #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_VAL(x) \ |
| 78 | ((x) << ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_SHIFT) |
| 79 | #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_64B \ |
| 80 | ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_VAL(1) |
| 81 | #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_128B \ |
| 82 | ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_VAL(2) |
| 83 | #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_256B \ |
| 84 | ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_VAL(3) |
| 85 | #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_SHIFT 4 |
| 86 | #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_MASK \ |
| 87 | (0x7 << ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_SHIFT) |
| 88 | #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_VAL(x) \ |
| 89 | ((x) << ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_SHIFT) |
| 90 | #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_64B \ |
| 91 | ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_VAL(1) |
| 92 | #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_128B \ |
| 93 | ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_VAL(2) |
| 94 | #define ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_256B \ |
| 95 | ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_VAL(3) |
| 96 | #define ESPI_SLAVE_PERIPH_BUS_MASTER_ENABLE (1 << 2) |
| 97 | |
| 98 | #define ESPI_SLAVE_VW_CFG 0x20 |
| 99 | #define ESPI_SLAVE_VW_COUNT_SEL_SHIFT 16 |
| 100 | #define ESPI_SLAVE_VW_COUNT_SEL_MASK (0x3f << ESPI_SLAVE_VW_COUNT_SEL_SHIFT) |
| 101 | /* 0-based field. Value of 0 indicates 1 virtual wire selected. */ |
| 102 | #define ESPI_SLAVE_VW_COUNT_SEL_VAL(x) \ |
| 103 | ((x) << ESPI_SLAVE_VW_COUNT_SEL_SHIFT) |
| 104 | #define ESPI_SLAVE_VW_COUNT_SUPP_SHIFT 8 |
| 105 | #define ESPI_SLAVE_VW_COUNT_SUPP_MASK \ |
| 106 | (0x3f << ESPI_SLAVE_VW_COUNT_SUPP_SHIFT) |
| 107 | |
| 108 | #define ESPI_SLAVE_OOB_CFG 0x30 |
| 109 | #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_SHIFT 8 |
| 110 | #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_MASK \ |
| 111 | (0x7 << ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_SHIFT) |
| 112 | #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_VAL(x) \ |
| 113 | ((x) << ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_SHIFT) |
| 114 | #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_64B \ |
| 115 | ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_VAL(1) |
| 116 | #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_128B \ |
| 117 | ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_VAL(2) |
| 118 | #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_256B \ |
| 119 | ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SEL_VAL(3) |
| 120 | #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_SHIFT 4 |
| 121 | #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_MASK \ |
| 122 | (0x7 << ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_SHIFT) |
| 123 | #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_VAL(x) \ |
| 124 | ((x) << ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_SHIFT) |
| 125 | #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_64B \ |
| 126 | ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_VAL(1) |
| 127 | #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_128B \ |
| 128 | ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_VAL(2) |
| 129 | #define ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_256B \ |
| 130 | ESPI_SLAVE_OOB_MAX_PAYLOAD_SIZE_SUPP_VAL(3) |
| 131 | |
| 132 | #define ESPI_SLAVE_FLASH_CFG 0x40 |
| 133 | #define ESPI_SLAVE_FLASH_MAX_READ_SIZE_SHIFT 12 |
| 134 | #define ESPI_SLAVE_FLASH_MAX_READ_SIZE_MASK \ |
| 135 | (0x7 << ESPI_SLAVE_FLASH_MAX_READ_SIZE_SHIFT) |
| 136 | #define ESPI_SLAVE_FLASH_MAX_READ_SIZE_VAL(x) \ |
| 137 | ((x) << ESPI_SLAVE_FLASH_MAX_READ_SIZE_SHIFT) |
| 138 | #define ESPI_SLAVE_FLASH_MAX_READ_64B ESPI_SLAVE_FLASH_MAX_READ_SIZE_VAL(1) |
| 139 | #define ESPI_SLAVE_FLASH_MAX_READ_128B ESPI_SLAVE_FLASH_MAX_READ_SIZE_VAL(2) |
| 140 | #define ESPI_SLAVE_FLASH_MAX_READ_256B ESPI_SLAVE_FLASH_MAX_READ_SIZE_VAL(3) |
| 141 | #define ESPI_SLAVE_FLASH_MAX_READ_512B ESPI_SLAVE_FLASH_MAX_READ_SIZE_VAL(4) |
| 142 | #define ESPI_SLAVE_FLASH_MAX_READ_1024B ESPI_SLAVE_FLASH_MAX_READ_SIZE_VAL(5) |
| 143 | #define ESPI_SLAVE_FLASH_MAX_READ_2048B ESPI_SLAVE_FLASH_MAX_READ_SIZE_VAL(6) |
| 144 | #define ESPI_SLAVE_FLASH_MAX_READ_4096B ESPI_SLAVE_FLASH_MAX_READ_SIZE_VAL(7) |
| 145 | #define ESPI_SLAVE_FLASH_SHARING_MODE_MAF (1 << 11) |
| 146 | #define ESPI_SLAVE_FLASH_SHARING_MODE_SAF (0 << 11) |
| 147 | #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_SHIFT 8 |
| 148 | #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_MASK \ |
| 149 | (0x7 << ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_SHIFT) |
| 150 | #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_VAL(x) \ |
| 151 | ((x) << ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_SHIFT) |
| 152 | #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_64B \ |
| 153 | ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_VAL(1) |
| 154 | #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_128B \ |
| 155 | ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_VAL(2) |
| 156 | #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_256B \ |
| 157 | ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SEL_VAL(3) |
| 158 | #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_SHIFT 5 |
| 159 | #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_MASK \ |
| 160 | (0x7 << ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_SHIFT) |
| 161 | #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_VAL(x) \ |
| 162 | ((x) << ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_SHIFT) |
| 163 | #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_64B \ |
| 164 | ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_VAL(1) |
| 165 | #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_128B \ |
| 166 | ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_VAL(2) |
| 167 | #define ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_256B \ |
| 168 | ESPI_SLAVE_FLASH_MAX_PAYLOAD_SIZE_SUPP_VAL(3) |
| 169 | #define ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_SHIFT 2 |
| 170 | #define ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_MASK \ |
| 171 | (0x7 << ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_SHIFT) |
| 172 | #define ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_VAL(x) \ |
| 173 | ((x) << ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_SHIFT) |
| 174 | #define ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_4K \ |
| 175 | ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_VAL(1) |
| 176 | #define ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_64K \ |
| 177 | ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_VAL(2) |
| 178 | #define ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_4K_64K \ |
| 179 | ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_VAL(3) |
| 180 | #define ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_128K \ |
| 181 | ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_VAL(4) |
| 182 | #define ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_256K \ |
| 183 | ESPI_SLAVE_FLASH_BLOCK_ERASE_SIZE_VAL(5) |
| 184 | |
| 185 | /* |
| 186 | * All channels -- peripheral, OOB, VW and flash use the same bits for channel ready and channel |
| 187 | * enable. |
| 188 | */ |
| 189 | #define ESPI_SLAVE_CHANNEL_READY (1 << 1) |
| 190 | #define ESPI_SLAVE_CHANNEL_ENABLE (1 << 0) |
| 191 | |
| 192 | #endif /* __ESPI_H__ */ |