Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 2 | |
| 3 | #ifndef _INTEL_ME_H |
| 4 | #define _INTEL_ME_H |
| 5 | |
Felix Held | 6266c41 | 2021-09-16 23:24:41 +0200 | [diff] [blame^] | 6 | #include <types.h> |
| 7 | |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 8 | #define ME_RETRY 100000 /* 1 second */ |
| 9 | #define ME_DELAY 10 /* 10 us */ |
| 10 | |
| 11 | /* |
| 12 | * Management Engine PCI registers |
| 13 | */ |
| 14 | |
| 15 | #define PCI_CPU_DEVICE PCI_DEV(0,0,0) |
| 16 | #define PCI_CPU_MEBASE_L 0x70 /* Set by MRC */ |
| 17 | #define PCI_CPU_MEBASE_H 0x74 /* Set by MRC */ |
| 18 | |
| 19 | #define PCI_ME_HFS 0x40 |
| 20 | #define ME_HFS_CWS_RESET 0 |
| 21 | #define ME_HFS_CWS_INIT 1 |
| 22 | #define ME_HFS_CWS_REC 2 |
| 23 | #define ME_HFS_CWS_NORMAL 5 |
| 24 | #define ME_HFS_CWS_WAIT 6 |
| 25 | #define ME_HFS_CWS_TRANS 7 |
| 26 | #define ME_HFS_CWS_INVALID 8 |
| 27 | #define ME_HFS_STATE_PREBOOT 0 |
| 28 | #define ME_HFS_STATE_M0_UMA 1 |
| 29 | #define ME_HFS_STATE_M3 4 |
| 30 | #define ME_HFS_STATE_M0 5 |
| 31 | #define ME_HFS_STATE_BRINGUP 6 |
| 32 | #define ME_HFS_STATE_ERROR 7 |
| 33 | #define ME_HFS_ERROR_NONE 0 |
| 34 | #define ME_HFS_ERROR_UNCAT 1 |
| 35 | #define ME_HFS_ERROR_IMAGE 3 |
| 36 | #define ME_HFS_ERROR_DEBUG 4 |
| 37 | #define ME_HFS_MODE_NORMAL 0 |
| 38 | #define ME_HFS_MODE_DEBUG 2 |
| 39 | #define ME_HFS_MODE_DIS 3 |
| 40 | #define ME_HFS_MODE_OVER_JMPR 4 |
| 41 | #define ME_HFS_MODE_OVER_MEI 5 |
| 42 | #define ME_HFS_BIOS_DRAM_ACK 1 |
| 43 | #define ME_HFS_ACK_NO_DID 0 |
| 44 | #define ME_HFS_ACK_RESET 1 |
| 45 | #define ME_HFS_ACK_PWR_CYCLE 2 |
| 46 | #define ME_HFS_ACK_S3 3 |
| 47 | #define ME_HFS_ACK_S4 4 |
| 48 | #define ME_HFS_ACK_S5 5 |
| 49 | #define ME_HFS_ACK_GBL_RESET 6 |
| 50 | #define ME_HFS_ACK_CONTINUE 7 |
| 51 | |
| 52 | struct me_hfs { |
| 53 | u32 working_state: 4; |
| 54 | u32 mfg_mode: 1; |
| 55 | u32 fpt_bad: 1; |
| 56 | u32 operation_state: 3; |
| 57 | u32 fw_init_complete: 1; |
| 58 | u32 ft_bup_ld_flr: 1; |
| 59 | u32 update_in_progress: 1; |
| 60 | u32 error_code: 4; |
| 61 | u32 operation_mode: 4; |
| 62 | u32 reserved: 4; |
| 63 | u32 boot_options_present: 1; |
| 64 | u32 ack_data: 3; |
| 65 | u32 bios_msg_ack: 4; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 66 | } __packed; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 67 | |
| 68 | #define PCI_ME_UMA 0x44 |
| 69 | |
| 70 | struct me_uma { |
| 71 | u32 size: 6; |
| 72 | u32 reserved_1: 10; |
| 73 | u32 valid: 1; |
| 74 | u32 reserved_0: 14; |
| 75 | u32 set_to_one: 1; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 76 | } __packed; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 77 | |
| 78 | #define PCI_ME_H_GS 0x4c |
| 79 | #define ME_INIT_DONE 1 |
| 80 | #define ME_INIT_STATUS_SUCCESS 0 |
| 81 | #define ME_INIT_STATUS_NOMEM 1 |
| 82 | #define ME_INIT_STATUS_ERROR 2 |
| 83 | |
| 84 | struct me_did { |
| 85 | u32 uma_base: 16; |
| 86 | u32 reserved: 8; |
| 87 | u32 status: 4; |
| 88 | u32 init_done: 4; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 89 | } __packed; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 90 | |
| 91 | #define PCI_ME_GMES 0x48 |
| 92 | #define ME_GMES_PHASE_ROM 0 |
| 93 | #define ME_GMES_PHASE_BUP 1 |
| 94 | #define ME_GMES_PHASE_UKERNEL 2 |
| 95 | #define ME_GMES_PHASE_POLICY 3 |
| 96 | #define ME_GMES_PHASE_MODULE 4 |
| 97 | #define ME_GMES_PHASE_UNKNOWN 5 |
| 98 | #define ME_GMES_PHASE_HOST 6 |
| 99 | |
| 100 | struct me_gmes { |
| 101 | u32 bist_in_prog : 1; |
| 102 | u32 icc_prog_sts : 2; |
| 103 | u32 invoke_mebx : 1; |
| 104 | u32 cpu_replaced_sts : 1; |
| 105 | u32 mbp_rdy : 1; |
| 106 | u32 mfs_failure : 1; |
| 107 | u32 warm_rst_req_for_df : 1; |
| 108 | u32 cpu_replaced_valid : 1; |
| 109 | u32 reserved_1 : 2; |
| 110 | u32 fw_upd_ipu : 1; |
| 111 | u32 reserved_2 : 4; |
| 112 | u32 current_state: 8; |
| 113 | u32 current_pmevent: 4; |
| 114 | u32 progress_code: 4; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 115 | } __packed; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 116 | |
| 117 | #define PCI_ME_HERES 0xbc |
| 118 | #define PCI_ME_EXT_SHA1 0x00 |
| 119 | #define PCI_ME_EXT_SHA256 0x02 |
| 120 | #define PCI_ME_HER(x) (0xc0+(4*(x))) |
| 121 | |
| 122 | struct me_heres { |
| 123 | u32 extend_reg_algorithm: 4; |
| 124 | u32 reserved: 26; |
| 125 | u32 extend_feature_present: 1; |
| 126 | u32 extend_reg_valid: 1; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 127 | } __packed; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 128 | |
| 129 | /* |
| 130 | * Management Engine MEI registers |
| 131 | */ |
| 132 | |
| 133 | #define MEI_H_CB_WW 0x00 |
| 134 | #define MEI_H_CSR 0x04 |
| 135 | #define MEI_ME_CB_RW 0x08 |
| 136 | #define MEI_ME_CSR_HA 0x0c |
| 137 | |
| 138 | struct mei_csr { |
| 139 | u32 interrupt_enable: 1; |
| 140 | u32 interrupt_status: 1; |
| 141 | u32 interrupt_generate: 1; |
| 142 | u32 ready: 1; |
| 143 | u32 reset: 1; |
| 144 | u32 reserved: 3; |
| 145 | u32 buffer_read_ptr: 8; |
| 146 | u32 buffer_write_ptr: 8; |
| 147 | u32 buffer_depth: 8; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 148 | } __packed; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 149 | |
| 150 | #define MEI_ADDRESS_CORE 0x01 |
| 151 | #define MEI_ADDRESS_AMT 0x02 |
| 152 | #define MEI_ADDRESS_RESERVED 0x03 |
| 153 | #define MEI_ADDRESS_WDT 0x04 |
| 154 | #define MEI_ADDRESS_MKHI 0x07 |
| 155 | #define MEI_ADDRESS_ICC 0x08 |
| 156 | #define MEI_ADDRESS_THERMAL 0x09 |
| 157 | |
| 158 | #define MEI_HOST_ADDRESS 0 |
| 159 | |
| 160 | struct mei_header { |
| 161 | u32 client_address: 8; |
| 162 | u32 host_address: 8; |
| 163 | u32 length: 9; |
| 164 | u32 reserved: 6; |
| 165 | u32 is_complete: 1; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 166 | } __packed; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 167 | |
| 168 | #define MKHI_GROUP_ID_CBM 0x00 |
| 169 | #define MKHI_GROUP_ID_FWCAPS 0x03 |
| 170 | #define MKHI_GROUP_ID_MDES 0x08 |
| 171 | #define MKHI_GROUP_ID_GEN 0xff |
| 172 | |
| 173 | #define MKHI_GLOBAL_RESET 0x0b |
| 174 | |
| 175 | #define MKHI_FWCAPS_GET_RULE 0x02 |
| 176 | |
| 177 | #define MKHI_MDES_ENABLE 0x09 |
| 178 | |
| 179 | #define MKHI_GET_FW_VERSION 0x02 |
Elyes HAOUAS | b0f1988 | 2018-06-09 11:59:00 +0200 | [diff] [blame] | 180 | #define MKHI_SET_UMA 0x08 |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 181 | #define MKHI_END_OF_POST 0x0c |
| 182 | #define MKHI_FEATURE_OVERRIDE 0x14 |
| 183 | |
| 184 | struct mkhi_header { |
| 185 | u32 group_id: 8; |
| 186 | u32 command: 7; |
| 187 | u32 is_response: 1; |
| 188 | u32 reserved: 8; |
| 189 | u32 result: 8; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 190 | } __packed; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 191 | |
| 192 | struct me_fw_version { |
| 193 | u16 code_minor; |
| 194 | u16 code_major; |
| 195 | u16 code_build_number; |
| 196 | u16 code_hot_fix; |
| 197 | u16 recovery_minor; |
| 198 | u16 recovery_major; |
| 199 | u16 recovery_build_number; |
| 200 | u16 recovery_hot_fix; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 201 | } __packed; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 202 | |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 203 | #define HECI_EOP_STATUS_SUCCESS 0x0 |
| 204 | #define HECI_EOP_PERFORM_GLOBAL_RESET 0x1 |
| 205 | |
| 206 | #define CBM_RR_GLOBAL_RESET 0x01 |
| 207 | |
| 208 | #define GLOBAL_RESET_BIOS_MRC 0x01 |
| 209 | #define GLOBAL_RESET_BIOS_POST 0x02 |
| 210 | #define GLOBAL_RESET_MEBX 0x03 |
| 211 | |
| 212 | struct me_global_reset { |
| 213 | u8 request_origin; |
| 214 | u8 reset_type; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 215 | } __packed; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 216 | |
| 217 | typedef enum { |
| 218 | ME_NORMAL_BIOS_PATH, |
| 219 | ME_S3WAKE_BIOS_PATH, |
| 220 | ME_ERROR_BIOS_PATH, |
| 221 | ME_RECOVERY_BIOS_PATH, |
| 222 | ME_DISABLE_BIOS_PATH, |
| 223 | ME_FIRMWARE_UPDATE_BIOS_PATH, |
| 224 | } me_bios_path; |
| 225 | |
| 226 | /* Defined in me_status.c for both romstage and ramstage */ |
| 227 | void intel_me_status(struct me_hfs *hfs, struct me_gmes *gmes); |
| 228 | |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 229 | void intel_early_me_status(void); |
| 230 | int intel_early_me_init(void); |
| 231 | int intel_early_me_uma_size(void); |
| 232 | int intel_early_me_init_done(u8 status); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 233 | |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 234 | typedef struct { |
| 235 | u32 major_version : 16; |
| 236 | u32 minor_version : 16; |
| 237 | u32 hotfix_version : 16; |
| 238 | u32 build_version : 16; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 239 | } __packed mbp_fw_version_name; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 240 | |
| 241 | typedef struct { |
| 242 | u8 num_icc_profiles; |
| 243 | u8 icc_profile_soft_strap; |
| 244 | u8 icc_profile_index; |
| 245 | u8 reserved; |
| 246 | u32 register_lock_mask[3]; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 247 | } __packed mbp_icc_profile; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 248 | |
| 249 | typedef struct { |
| 250 | u32 full_net : 1; |
| 251 | u32 std_net : 1; |
| 252 | u32 manageability : 1; |
| 253 | u32 small_business : 1; |
| 254 | u32 l3manageability : 1; |
| 255 | u32 intel_at : 1; |
| 256 | u32 intel_cls : 1; |
| 257 | u32 reserved : 3; |
| 258 | u32 intel_mpc : 1; |
| 259 | u32 icc_over_clocking : 1; |
| 260 | u32 pavp : 1; |
| 261 | u32 reserved_1 : 4; |
| 262 | u32 ipv6 : 1; |
| 263 | u32 kvm : 1; |
| 264 | u32 och : 1; |
| 265 | u32 vlan : 1; |
| 266 | u32 tls : 1; |
| 267 | u32 reserved_4 : 1; |
| 268 | u32 wlan : 1; |
| 269 | u32 reserved_5 : 8; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 270 | } __packed mefwcaps_sku; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 271 | |
| 272 | typedef struct { |
| 273 | u16 lock_state : 1; |
| 274 | u16 authenticate_module : 1; |
Elyes HAOUAS | b0f1988 | 2018-06-09 11:59:00 +0200 | [diff] [blame] | 275 | u16 s3authentication : 1; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 276 | u16 flash_wear_out : 1; |
| 277 | u16 flash_variable_security : 1; |
| 278 | u16 wwan3gpresent : 1; |
| 279 | u16 wwan3goob : 1; |
| 280 | u16 reserved : 9; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 281 | } __packed tdt_state_flag; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 282 | |
| 283 | typedef struct { |
| 284 | u8 state; |
| 285 | u8 last_theft_trigger; |
| 286 | tdt_state_flag flags; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 287 | } __packed tdt_state_info; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 288 | |
| 289 | typedef struct { |
| 290 | u32 platform_target_usage_type : 4; |
| 291 | u32 platform_target_market_type : 2; |
| 292 | u32 super_sku : 1; |
| 293 | u32 reserved : 1; |
| 294 | u32 intel_me_fw_image_type : 4; |
| 295 | u32 platform_brand : 4; |
| 296 | u32 reserved_1 : 16; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 297 | } __packed platform_type_rule_data; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 298 | |
| 299 | typedef struct { |
| 300 | mefwcaps_sku fw_capabilities; |
| 301 | u8 available; |
| 302 | } mbp_fw_caps; |
| 303 | |
| 304 | typedef struct { |
| 305 | u16 device_id; |
| 306 | u16 fuse_test_flags; |
| 307 | u32 umchid[4]; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 308 | } __packed mbp_rom_bist_data; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 309 | |
| 310 | typedef struct { |
| 311 | u32 key[8]; |
| 312 | } mbp_platform_key; |
| 313 | |
| 314 | typedef struct { |
| 315 | platform_type_rule_data rule_data; |
| 316 | u8 available; |
| 317 | } mbp_plat_type; |
| 318 | |
| 319 | typedef struct { |
| 320 | mbp_fw_version_name fw_version_name; |
| 321 | mbp_fw_caps fw_caps_sku; |
| 322 | mbp_rom_bist_data rom_bist_data; |
| 323 | mbp_platform_key platform_key; |
| 324 | mbp_plat_type fw_plat_type; |
| 325 | mbp_icc_profile icc_profile; |
| 326 | tdt_state_info at_state; |
| 327 | u32 mfsintegrity; |
| 328 | } me_bios_payload; |
| 329 | |
| 330 | typedef struct { |
| 331 | u32 mbp_size : 8; |
| 332 | u32 num_entries : 8; |
Elyes HAOUAS | b0f1988 | 2018-06-09 11:59:00 +0200 | [diff] [blame] | 333 | u32 rsvd : 16; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 334 | } __packed mbp_header; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 335 | |
| 336 | typedef struct { |
| 337 | u32 app_id : 8; |
| 338 | u32 item_id : 8; |
| 339 | u32 length : 8; |
| 340 | u32 rsvd : 8; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 341 | } __packed mbp_item_header; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 342 | |
| 343 | struct me_fwcaps { |
| 344 | u32 id; |
| 345 | u8 length; |
| 346 | mefwcaps_sku caps_sku; |
| 347 | u8 reserved[3]; |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 348 | } __packed; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 349 | |
| 350 | #endif /* _INTEL_ME_H */ |