Ronald G. Minnich | 6226f13 | 2007-09-08 18:32:53 +0000 | [diff] [blame^] | 1 | #define ASSEMBLY 1 |
| 2 | |
| 3 | #include <stdint.h> |
| 4 | #include <device/pci_def.h> |
| 5 | #include <arch/io.h> |
| 6 | #include <device/pnp_def.h> |
| 7 | #include <arch/romcc_io.h> |
| 8 | #include <arch/hlt.h> |
| 9 | #include "pc80/serial.c" |
| 10 | #include "arch/i386/lib/console.c" |
| 11 | #include "ram/ramtest.c" |
| 12 | #include "cpu/x86/bist.h" |
| 13 | #include "cpu/x86/msr.h" |
| 14 | #include <cpu/amd/lxdef.h> |
| 15 | #include <cpu/amd/geode_post_code.h> |
| 16 | #include "southbridge/amd/cs5536/cs5536.h" |
| 17 | |
| 18 | #define POST_CODE(x) outb(x, 0x80) |
| 19 | #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) |
| 20 | |
| 21 | #include "southbridge/amd/cs5536/cs5536_early_smbus.c" |
| 22 | #include "southbridge/amd/cs5536/cs5536_early_setup.c" |
| 23 | #include "superio/winbond/w83627hf/w83627hf_early_serial.c" |
| 24 | |
| 25 | static inline int spd_read_byte(unsigned device, unsigned address) |
| 26 | { |
| 27 | return smbus_read_byte(device, address); |
| 28 | } |
| 29 | |
| 30 | #define ManualConf 0 /* Do automatic strapped PLL config */ |
| 31 | #define PLLMSRhi 0x00001490 /* manual settings for the PLL */ |
| 32 | #define PLLMSRlo 0x02000030 |
| 33 | #define DIMM0 0xA0 |
| 34 | #define DIMM1 0xA2 |
| 35 | #include "northbridge/amd/lx/raminit.h" |
| 36 | #include "northbridge/amd/lx/pll_reset.c" |
| 37 | #include "northbridge/amd/lx/raminit.c" |
| 38 | #include "sdram/generic_sdram.c" |
| 39 | #include "cpu/amd/model_lx/cpureginit.c" |
| 40 | #include "cpu/amd/model_lx/syspreinit.c" |
| 41 | |
| 42 | static void msr_init(void) |
| 43 | { |
| 44 | msr_t msr; |
| 45 | /* Setup access to the MC for under 1MB. Note MC not setup yet. */ |
| 46 | msr.hi = 0x24fffc02; |
| 47 | msr.lo = 0x10010000; |
| 48 | wrmsr(CPU_RCONF_DEFAULT, msr); |
| 49 | |
| 50 | msr.hi = 0x20000000; |
| 51 | msr.lo = 0xfff00; |
| 52 | wrmsr(MSR_GLIU0 + 0x20, msr); |
| 53 | |
| 54 | msr.hi = 0x20000000; |
| 55 | msr.lo = 0xfff00; |
| 56 | wrmsr(MSR_GLIU1 + 0x20, msr); |
| 57 | |
| 58 | } |
| 59 | |
| 60 | static void mb_gpio_init(void) |
| 61 | { |
| 62 | /* Early mainboard specific GPIO setup */ |
| 63 | } |
| 64 | |
| 65 | void cache_as_ram_main(void) |
| 66 | { |
| 67 | extern void RestartCAR(); |
| 68 | POST_CODE(0x01); |
| 69 | |
| 70 | static const struct mem_controller memctrl [] = { |
| 71 | {.channel0 = {(0xa<<3)|0, (0xa<<3)|1}} |
| 72 | }; |
| 73 | |
| 74 | SystemPreInit(); |
| 75 | msr_init(); |
| 76 | |
| 77 | cs5536_early_setup(); |
| 78 | |
| 79 | /* NOTE: must do this AFTER the early_setup! |
| 80 | * it is counting on some early MSR setup |
| 81 | * for cs5536 |
| 82 | */ |
| 83 | cs5536_disable_internal_uart(); |
| 84 | w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE); |
| 85 | mb_gpio_init(); |
| 86 | uart_init(); |
| 87 | console_init(); |
| 88 | |
| 89 | pll_reset(ManualConf); |
| 90 | |
| 91 | cpuRegInit(); |
| 92 | |
| 93 | sdram_initialize(1, memctrl); |
| 94 | |
| 95 | /* Check all of memory */ |
| 96 | ram_check(0x00000000, 640*1024); |
| 97 | |
| 98 | /* Switch from Cache as RAM to real RAM */ |
| 99 | /* There are two ways we could think about this. |
| 100 | 1. If we are using the auto.inc ROMCC way, the stack is going to be re-setup in the code following this code. |
| 101 | Just wbinvd the stack to clear the cache tags. We don't care where the stack used to be. |
| 102 | 2. This file is built as a normal .c -> .o and linked in etc. The stack might be used to return etc. |
| 103 | That means we care about what is in the stack. If we are smart we set the CAR stack to the same location |
| 104 | as the rest of LinuxBIOS. If that is the case we can just do a wbinvd. The stack will be written into real |
| 105 | RAM that is now setup and we continue like nothing happened. If the stack is located somewhere other than |
| 106 | where LB would like it, you need to write some code to do a copy from cache to RAM |
| 107 | |
| 108 | We use method 1 on Norwich and on this board too. |
| 109 | */ |
| 110 | POST_CODE(0x02); |
| 111 | print_err("POST 02\n"); |
| 112 | __asm__("wbinvd\n"); |
| 113 | print_err("Past wbinvd\n"); |
| 114 | /* we are finding the return does not work on this board. Explicitly call the label that is |
| 115 | * after the call to us. This is gross, but sometimes at this level it is the only way out |
| 116 | */ |
| 117 | done_cache_as_ram_main(); |
| 118 | } |