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zbao246e84b2012-07-13 18:47:03 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2012 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
Zheng Bao7bcffa52012-11-28 11:36:52 +080019#include <stdint.h>
20#include <stdlib.h>
21#include <string.h>
zbao246e84b2012-07-13 18:47:03 +080022#include <arch/io.h>
Zheng Bao600784e2013-02-07 17:30:23 +080023#include <spi-generic.h>
zbao246e84b2012-07-13 18:47:03 +080024#include <device/device.h>
Zheng Bao7bcffa52012-11-28 11:36:52 +080025#include <device/pci.h>
26#include <device/pci_ops.h>
zbao246e84b2012-07-13 18:47:03 +080027
Martin Roth3316cf22012-12-05 16:22:54 -070028#if defined (CONFIG_HUDSON_IMC_FWM)
29#include "FchPlatform.h"
30
31static int bus_claimed = 0;
32#endif
33
Zheng Bao7bcffa52012-11-28 11:36:52 +080034static u32 spibar;
35
36static void reset_internal_fifo_pointer(void)
zbao246e84b2012-07-13 18:47:03 +080037{
zbao246e84b2012-07-13 18:47:03 +080038 do {
Zheng Bao7bcffa52012-11-28 11:36:52 +080039 write8(spibar + 2, read8(spibar + 2) | 0x10);
40 } while (read8(spibar + 0xD) & 0x7);
zbao246e84b2012-07-13 18:47:03 +080041}
42
Zheng Bao7bcffa52012-11-28 11:36:52 +080043static void execute_command(void)
zbao246e84b2012-07-13 18:47:03 +080044{
Zheng Bao7bcffa52012-11-28 11:36:52 +080045 write8(spibar + 2, read8(spibar + 2) | 1);
46
47 while ((read8(spibar + 2) & 1) && (read8(spibar+3) & 0x80));
zbao246e84b2012-07-13 18:47:03 +080048}
49
Zheng Bao7bcffa52012-11-28 11:36:52 +080050void spi_init()
zbao246e84b2012-07-13 18:47:03 +080051{
Zheng Bao7bcffa52012-11-28 11:36:52 +080052 device_t dev;
53
54 dev = dev_find_slot(0, PCI_DEVFN(0x14, 3));
55 spibar = pci_read_config32(dev, 0xA0) & ~0x1F;
zbao246e84b2012-07-13 18:47:03 +080056}
57
Zheng Bao7bcffa52012-11-28 11:36:52 +080058int spi_xfer(struct spi_slave *slave, const void *dout,
59 unsigned int bitsout, void *din, unsigned int bitsin)
zbao246e84b2012-07-13 18:47:03 +080060{
Zheng Bao7bcffa52012-11-28 11:36:52 +080061 /* First byte is cmd which can not being sent through FIFO. */
62 u8 cmd = *(u8 *)dout++;
63 u8 readoffby1;
64 u8 readwrite;
65 u8 bytesout, bytesin;
66 u8 count;
zbao246e84b2012-07-13 18:47:03 +080067
Zheng Bao7bcffa52012-11-28 11:36:52 +080068 bitsout -= 8;
69 bytesout = bitsout / 8;
70 bytesin = bitsin / 8;
zbao246e84b2012-07-13 18:47:03 +080071
Zheng Bao7bcffa52012-11-28 11:36:52 +080072 readoffby1 = bytesout ? 0 : 1;
zbao246e84b2012-07-13 18:47:03 +080073
Zheng Bao7bcffa52012-11-28 11:36:52 +080074 readwrite = (bytesin + readoffby1) << 4 | bytesout;
75 write8(spibar + 1, readwrite);
76 write8(spibar + 0, cmd);
zbao246e84b2012-07-13 18:47:03 +080077
Zheng Bao7bcffa52012-11-28 11:36:52 +080078 reset_internal_fifo_pointer();
79 for (count = 0; count < bytesout; count++, dout++) {
80 write8(spibar + 0x0C, *(u8 *)dout);
zbao246e84b2012-07-13 18:47:03 +080081 }
Zheng Bao7bcffa52012-11-28 11:36:52 +080082
83 reset_internal_fifo_pointer();
84 execute_command();
85
86 reset_internal_fifo_pointer();
87 /* Skip the bytes we sent. */
88 for (count = 0; count < bytesout; count++) {
89 cmd = read8(spibar + 0x0C);
90 }
91
92 reset_internal_fifo_pointer();
93 for (count = 0; count < bytesin; count++, din++) {
94 *(u8 *)din = read8(spibar + 0x0C);
95 }
96
97 return 0;
98}
99int spi_claim_bus(struct spi_slave *slave)
100{
Martin Roth3316cf22012-12-05 16:22:54 -0700101#if defined (CONFIG_HUDSON_IMC_FWM)
102
103 if (slave->rw == SPI_WRITE_FLAG) {
104 bus_claimed++;
105 if (bus_claimed == 1)
106 ImcSleep(NULL);
107 }
108#endif
109
Zheng Bao7bcffa52012-11-28 11:36:52 +0800110 return 0;
zbao246e84b2012-07-13 18:47:03 +0800111}
112
Zheng Bao7bcffa52012-11-28 11:36:52 +0800113void spi_release_bus(struct spi_slave *slave)
zbao246e84b2012-07-13 18:47:03 +0800114{
Martin Roth3316cf22012-12-05 16:22:54 -0700115#if defined (CONFIG_HUDSON_IMC_FWM)
116
117 if (slave->rw == SPI_WRITE_FLAG) {
118 bus_claimed--;
119 if (bus_claimed <= 0) {
120 bus_claimed = 0;
121 ImcWakeup(NULL);
122 }
123 }
124#endif
zbao246e84b2012-07-13 18:47:03 +0800125}
126
Zheng Bao7bcffa52012-11-28 11:36:52 +0800127void spi_cs_activate(struct spi_slave *slave)
zbao246e84b2012-07-13 18:47:03 +0800128{
Zheng Bao7bcffa52012-11-28 11:36:52 +0800129}
130
131void spi_cs_deactivate(struct spi_slave *slave)
132{
133}
134
135struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
136 unsigned int max_hz, unsigned int mode)
137{
138 struct spi_slave *slave = malloc(sizeof(*slave));
139
140 if (!slave) {
141 return NULL;
142 }
143
144 memset(slave, 0, sizeof(*slave));
145
146 return slave;
zbao246e84b2012-07-13 18:47:03 +0800147}