Angel Pons | 118a9c7 | 2020-04-02 23:48:34 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* This file is part of the coreboot project. */ |
Naresh G Solanki | 335781a | 2016-10-26 19:43:14 +0530 | [diff] [blame] | 3 | |
Naresh G Solanki | 335781a | 2016-10-26 19:43:14 +0530 | [diff] [blame] | 4 | #include <cbfs.h> |
| 5 | #include <console/console.h> |
| 6 | #include <spd_bin.h> |
| 7 | #include <string.h> |
Patrick Georgi | 0e3c59e | 2017-01-28 15:59:25 +0100 | [diff] [blame] | 8 | #include <device/dram/ddr3.h> |
Naresh G Solanki | 335781a | 2016-10-26 19:43:14 +0530 | [diff] [blame] | 9 | |
Naresh G Solanki | 335781a | 2016-10-26 19:43:14 +0530 | [diff] [blame] | 10 | void dump_spd_info(struct spd_block *blk) |
| 11 | { |
| 12 | u8 i; |
| 13 | |
| 14 | for (i = 0; i < CONFIG_DIMM_MAX; i++) |
| 15 | if (blk->spd_array[i] != NULL && blk->spd_array[i][0] != 0) { |
Furquan Shaikh | a26f9da | 2017-06-08 13:28:59 -0700 | [diff] [blame] | 16 | printk(BIOS_DEBUG, "SPD @ 0x%02X\n", blk->addr_map[i]); |
Naresh G Solanki | 335781a | 2016-10-26 19:43:14 +0530 | [diff] [blame] | 17 | print_spd_info(blk->spd_array[i]); |
| 18 | } |
| 19 | } |
| 20 | |
Eric Lai | 8fb7cd4 | 2020-03-07 13:55:33 +0800 | [diff] [blame] | 21 | static bool use_ddr4_params(int dram_type) |
Naresh G Solanki | 335781a | 2016-10-26 19:43:14 +0530 | [diff] [blame] | 22 | { |
Eric Lai | 8fb7cd4 | 2020-03-07 13:55:33 +0800 | [diff] [blame] | 23 | switch (dram_type) { |
| 24 | case SPD_DRAM_DDR3: |
| 25 | case SPD_DRAM_LPDDR3_INTEL: |
| 26 | return false; |
Eric Lai | cb1e386 | 2020-03-13 17:16:20 +0800 | [diff] [blame] | 27 | /* Below DDR type share the same attributes */ |
Eric Lai | 8fb7cd4 | 2020-03-07 13:55:33 +0800 | [diff] [blame] | 28 | case SPD_DRAM_LPDDR3_JEDEC: |
| 29 | case SPD_DRAM_DDR4: |
| 30 | case SPD_DRAM_LPDDR4: |
Eric Lai | cb1e386 | 2020-03-13 17:16:20 +0800 | [diff] [blame] | 31 | case SPD_DRAM_LPDDR4X: |
Eric Lai | 8fb7cd4 | 2020-03-07 13:55:33 +0800 | [diff] [blame] | 32 | return true; |
| 33 | default: |
| 34 | printk(BIOS_ERR, "Defaulting to using DDR4 params. Please add dram_type check for %d to %s\n", |
| 35 | dram_type, __func__); |
| 36 | return true; |
| 37 | } |
Eric Lai | aa8d772 | 2019-09-02 15:01:56 +0800 | [diff] [blame] | 38 | } |
Naresh G Solanki | 335781a | 2016-10-26 19:43:14 +0530 | [diff] [blame] | 39 | |
Eric Lai | aa8d772 | 2019-09-02 15:01:56 +0800 | [diff] [blame] | 40 | static const char *spd_get_module_type_string(int dram_type) |
| 41 | { |
| 42 | switch (dram_type) { |
Naresh G Solanki | 335781a | 2016-10-26 19:43:14 +0530 | [diff] [blame] | 43 | case SPD_DRAM_DDR3: |
Eric Lai | aa8d772 | 2019-09-02 15:01:56 +0800 | [diff] [blame] | 44 | return "DDR3"; |
| 45 | case SPD_DRAM_LPDDR3_INTEL: |
| 46 | case SPD_DRAM_LPDDR3_JEDEC: |
| 47 | return "LPDDR3"; |
| 48 | case SPD_DRAM_DDR4: |
| 49 | return "DDR4"; |
Eric Lai | d0ee870 | 2020-03-06 21:18:30 +0800 | [diff] [blame] | 50 | case SPD_DRAM_LPDDR4: |
| 51 | return "LPDDR4"; |
Eric Lai | cb1e386 | 2020-03-13 17:16:20 +0800 | [diff] [blame] | 52 | case SPD_DRAM_LPDDR4X: |
| 53 | return "LPDDR4X"; |
| 54 | case SPD_DRAM_DDR5: |
| 55 | return "DDR5"; |
| 56 | case SPD_DRAM_LPDDR5: |
| 57 | return "LPDDR5"; |
Eric Lai | aa8d772 | 2019-09-02 15:01:56 +0800 | [diff] [blame] | 58 | } |
| 59 | return "UNKNOWN"; |
| 60 | } |
| 61 | |
| 62 | static int spd_get_banks(const uint8_t spd[], int dram_type) |
| 63 | { |
| 64 | static const int ddr3_banks[4] = { 8, 16, 32, 64 }; |
| 65 | static const int ddr4_banks[10] = { 4, 8, -1, -1, 8, 16, -1, -1, 16, 32 }; |
| 66 | int index = (spd[SPD_DENSITY_BANKS] >> 4) & 0xf; |
Eric Lai | 4d5fd77 | 2020-03-13 17:21:59 +0800 | [diff] [blame] | 67 | |
| 68 | if (use_ddr4_params(dram_type)) { |
Eric Lai | aa8d772 | 2019-09-02 15:01:56 +0800 | [diff] [blame] | 69 | if (index >= ARRAY_SIZE(ddr4_banks)) |
| 70 | return -1; |
| 71 | return ddr4_banks[index]; |
Eric Lai | 4d5fd77 | 2020-03-13 17:21:59 +0800 | [diff] [blame] | 72 | } else { |
| 73 | if (index >= ARRAY_SIZE(ddr3_banks)) |
| 74 | return -1; |
| 75 | return ddr3_banks[index]; |
Eric Lai | aa8d772 | 2019-09-02 15:01:56 +0800 | [diff] [blame] | 76 | } |
| 77 | } |
| 78 | |
| 79 | static int spd_get_capmb(const uint8_t spd[]) |
| 80 | { |
Eric Lai | d0ee870 | 2020-03-06 21:18:30 +0800 | [diff] [blame] | 81 | static const int spd_capmb[13] = { 1, 2, 4, 8, 16, 32, 64, |
| 82 | 128, 48, 96, 12, 24, 72 }; |
Eric Lai | aa8d772 | 2019-09-02 15:01:56 +0800 | [diff] [blame] | 83 | int index = spd[SPD_DENSITY_BANKS] & 0xf; |
| 84 | if (index >= ARRAY_SIZE(spd_capmb)) |
| 85 | return -1; |
| 86 | return spd_capmb[index] * 256; |
| 87 | } |
| 88 | |
| 89 | static int spd_get_rows(const uint8_t spd[]) |
| 90 | { |
| 91 | static const int spd_rows[7] = { 12, 13, 14, 15, 16, 17, 18 }; |
| 92 | int index = (spd[SPD_ADDRESSING] >> 3) & 7; |
| 93 | if (index >= ARRAY_SIZE(spd_rows)) |
| 94 | return -1; |
| 95 | return spd_rows[index]; |
| 96 | } |
| 97 | |
| 98 | static int spd_get_cols(const uint8_t spd[]) |
| 99 | { |
| 100 | static const int spd_cols[4] = { 9, 10, 11, 12 }; |
| 101 | int index = spd[SPD_ADDRESSING] & 7; |
| 102 | if (index >= ARRAY_SIZE(spd_cols)) |
| 103 | return -1; |
| 104 | return spd_cols[index]; |
| 105 | } |
| 106 | |
| 107 | static int spd_get_ranks(const uint8_t spd[], int dram_type) |
| 108 | { |
| 109 | static const int spd_ranks[8] = { 1, 2, 3, 4, 5, 6, 7, 8 }; |
Eric Lai | 8fb7cd4 | 2020-03-07 13:55:33 +0800 | [diff] [blame] | 110 | int organ_offset = use_ddr4_params(dram_type) ? DDR4_ORGANIZATION |
| 111 | : DDR3_ORGANIZATION; |
Eric Lai | aa8d772 | 2019-09-02 15:01:56 +0800 | [diff] [blame] | 112 | int index = (spd[organ_offset] >> 3) & 7; |
| 113 | if (index >= ARRAY_SIZE(spd_ranks)) |
| 114 | return -1; |
| 115 | return spd_ranks[index]; |
| 116 | } |
| 117 | |
| 118 | static int spd_get_devw(const uint8_t spd[], int dram_type) |
| 119 | { |
| 120 | static const int spd_devw[4] = { 4, 8, 16, 32 }; |
Eric Lai | 8fb7cd4 | 2020-03-07 13:55:33 +0800 | [diff] [blame] | 121 | int organ_offset = use_ddr4_params(dram_type) ? DDR4_ORGANIZATION |
| 122 | : DDR3_ORGANIZATION; |
Eric Lai | aa8d772 | 2019-09-02 15:01:56 +0800 | [diff] [blame] | 123 | int index = spd[organ_offset] & 7; |
| 124 | if (index >= ARRAY_SIZE(spd_devw)) |
| 125 | return -1; |
| 126 | return spd_devw[index]; |
| 127 | } |
| 128 | |
| 129 | static int spd_get_busw(const uint8_t spd[], int dram_type) |
| 130 | { |
| 131 | static const int spd_busw[4] = { 8, 16, 32, 64 }; |
Eric Lai | 8fb7cd4 | 2020-03-07 13:55:33 +0800 | [diff] [blame] | 132 | int busw_offset = use_ddr4_params(dram_type) ? DDR4_BUS_DEV_WIDTH |
| 133 | : DDR3_BUS_DEV_WIDTH; |
Eric Lai | aa8d772 | 2019-09-02 15:01:56 +0800 | [diff] [blame] | 134 | int index = spd[busw_offset] & 7; |
| 135 | if (index >= ARRAY_SIZE(spd_busw)) |
| 136 | return -1; |
| 137 | return spd_busw[index]; |
| 138 | } |
| 139 | |
| 140 | static void spd_get_name(const uint8_t spd[], char spd_name[], int dram_type) |
| 141 | { |
| 142 | switch (dram_type) { |
| 143 | case SPD_DRAM_DDR3: |
Naresh G Solanki | 335781a | 2016-10-26 19:43:14 +0530 | [diff] [blame] | 144 | memcpy(spd_name, &spd[DDR3_SPD_PART_OFF], DDR3_SPD_PART_LEN); |
| 145 | spd_name[DDR3_SPD_PART_LEN] = 0; |
| 146 | break; |
| 147 | case SPD_DRAM_LPDDR3_INTEL: |
Naresh G Solanki | 335781a | 2016-10-26 19:43:14 +0530 | [diff] [blame] | 148 | memcpy(spd_name, &spd[LPDDR3_SPD_PART_OFF], |
| 149 | LPDDR3_SPD_PART_LEN); |
| 150 | spd_name[LPDDR3_SPD_PART_LEN] = 0; |
| 151 | break; |
Eric Lai | 8fb7cd4 | 2020-03-07 13:55:33 +0800 | [diff] [blame] | 152 | /* LPDDR3, LPDDR4 and DDR4 have the same part number offset */ |
| 153 | case SPD_DRAM_LPDDR3_JEDEC: |
Naresh G Solanki | 335781a | 2016-10-26 19:43:14 +0530 | [diff] [blame] | 154 | case SPD_DRAM_DDR4: |
Eric Lai | d0ee870 | 2020-03-06 21:18:30 +0800 | [diff] [blame] | 155 | case SPD_DRAM_LPDDR4: |
Naresh G Solanki | 335781a | 2016-10-26 19:43:14 +0530 | [diff] [blame] | 156 | memcpy(spd_name, &spd[DDR4_SPD_PART_OFF], DDR4_SPD_PART_LEN); |
| 157 | spd_name[DDR4_SPD_PART_LEN] = 0; |
Naresh G Solanki | 335781a | 2016-10-26 19:43:14 +0530 | [diff] [blame] | 158 | break; |
| 159 | default: |
Naresh G Solanki | 335781a | 2016-10-26 19:43:14 +0530 | [diff] [blame] | 160 | break; |
| 161 | } |
Eric Lai | aa8d772 | 2019-09-02 15:01:56 +0800 | [diff] [blame] | 162 | } |
| 163 | |
| 164 | void print_spd_info(uint8_t spd[]) |
| 165 | { |
Paul Menzel | 599bc60 | 2020-03-14 01:12:21 +0100 | [diff] [blame] | 166 | char spd_name[DDR4_SPD_PART_LEN + 1] = { 0 }; |
Eric Lai | aa8d772 | 2019-09-02 15:01:56 +0800 | [diff] [blame] | 167 | int type = spd[SPD_DRAM_TYPE]; |
| 168 | int banks = spd_get_banks(spd, type); |
| 169 | int capmb = spd_get_capmb(spd); |
| 170 | int rows = spd_get_rows(spd); |
| 171 | int cols = spd_get_cols(spd); |
| 172 | int ranks = spd_get_ranks(spd, type); |
| 173 | int devw = spd_get_devw(spd, type); |
| 174 | int busw = spd_get_busw(spd, type); |
| 175 | |
| 176 | /* Module type */ |
| 177 | printk(BIOS_INFO, "SPD: module type is %s\n", |
| 178 | spd_get_module_type_string(type)); |
| 179 | /* Module Part Number */ |
| 180 | spd_get_name(spd, spd_name, type); |
Naresh G Solanki | 335781a | 2016-10-26 19:43:14 +0530 | [diff] [blame] | 181 | |
Eric Lai | 3d676f1 | 2020-03-06 23:54:12 +0800 | [diff] [blame] | 182 | printk(BIOS_INFO, "SPD: module part number is %s\n", spd_name); |
Naresh G Solanki | 335781a | 2016-10-26 19:43:14 +0530 | [diff] [blame] | 183 | |
| 184 | printk(BIOS_INFO, |
| 185 | "SPD: banks %d, ranks %d, rows %d, columns %d, density %d Mb\n", |
| 186 | banks, ranks, rows, cols, capmb); |
| 187 | printk(BIOS_INFO, "SPD: device width %d bits, bus width %d bits\n", |
| 188 | devw, busw); |
| 189 | |
| 190 | if (capmb > 0 && busw > 0 && devw > 0 && ranks > 0) { |
| 191 | /* SIZE = DENSITY / 8 * BUS_WIDTH / SDRAM_WIDTH * RANKS */ |
| 192 | printk(BIOS_INFO, "SPD: module size is %u MB (per channel)\n", |
| 193 | capmb / 8 * busw / devw * ranks); |
| 194 | } |
| 195 | } |
| 196 | |
Naresh G Solanki | 335781a | 2016-10-26 19:43:14 +0530 | [diff] [blame] | 197 | int get_spd_cbfs_rdev(struct region_device *spd_rdev, u8 spd_index) |
| 198 | { |
| 199 | struct cbfsf fh; |
| 200 | |
| 201 | uint32_t cbfs_type = CBFS_TYPE_SPD; |
| 202 | |
Naresh G Solanki | b8a5736 | 2016-12-13 20:27:15 +0530 | [diff] [blame] | 203 | if (cbfs_boot_locate(&fh, "spd.bin", &cbfs_type) < 0) |
| 204 | return -1; |
Naresh G Solanki | 335781a | 2016-10-26 19:43:14 +0530 | [diff] [blame] | 205 | cbfs_file_data(spd_rdev, &fh); |
| 206 | return rdev_chain(spd_rdev, spd_rdev, spd_index * CONFIG_DIMM_SPD_SIZE, |
| 207 | CONFIG_DIMM_SPD_SIZE); |
| 208 | } |
| 209 | |
Patrick Georgi | 0e3c59e | 2017-01-28 15:59:25 +0100 | [diff] [blame] | 210 | #if CONFIG_DIMM_SPD_SIZE == 128 |
| 211 | int read_ddr3_spd_from_cbfs(u8 *buf, int idx) |
| 212 | { |
| 213 | const int SPD_CRC_HI = 127; |
| 214 | const int SPD_CRC_LO = 126; |
| 215 | |
| 216 | const char *spd_file; |
| 217 | size_t spd_file_len = 0; |
| 218 | size_t min_len = (idx + 1) * CONFIG_DIMM_SPD_SIZE; |
| 219 | |
| 220 | spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD, |
| 221 | &spd_file_len); |
| 222 | if (!spd_file) |
| 223 | printk(BIOS_EMERG, "file [spd.bin] not found in CBFS"); |
| 224 | if (spd_file_len < min_len) |
| 225 | printk(BIOS_EMERG, "Missing SPD data."); |
| 226 | if (!spd_file || spd_file_len < min_len) |
| 227 | return -1; |
| 228 | |
Lee Leahy | 7340217 | 2017-03-10 15:23:24 -0800 | [diff] [blame] | 229 | memcpy(buf, spd_file + (idx * CONFIG_DIMM_SPD_SIZE), |
| 230 | CONFIG_DIMM_SPD_SIZE); |
Patrick Georgi | 0e3c59e | 2017-01-28 15:59:25 +0100 | [diff] [blame] | 231 | |
| 232 | u16 crc = spd_ddr3_calc_crc(buf, CONFIG_DIMM_SPD_SIZE); |
| 233 | |
| 234 | if (((buf[SPD_CRC_LO] == 0) && (buf[SPD_CRC_HI] == 0)) |
Lee Leahy | e20a319 | 2017-03-09 16:21:34 -0800 | [diff] [blame] | 235 | || (buf[SPD_CRC_LO] != (crc & 0xff)) |
| 236 | || (buf[SPD_CRC_HI] != (crc >> 8))) { |
Lee Leahy | 7340217 | 2017-03-10 15:23:24 -0800 | [diff] [blame] | 237 | printk(BIOS_WARNING, |
| 238 | "SPD CRC %02x%02x is invalid, should be %04x\n", |
Patrick Georgi | 0e3c59e | 2017-01-28 15:59:25 +0100 | [diff] [blame] | 239 | buf[SPD_CRC_HI], buf[SPD_CRC_LO], crc); |
| 240 | buf[SPD_CRC_LO] = crc & 0xff; |
| 241 | buf[SPD_CRC_HI] = crc >> 8; |
| 242 | u16 i; |
| 243 | printk(BIOS_WARNING, "\nDisplay the SPD"); |
| 244 | for (i = 0; i < CONFIG_DIMM_SPD_SIZE; i++) { |
Lee Leahy | 45fde70 | 2017-03-08 18:02:24 -0800 | [diff] [blame] | 245 | if ((i % 16) == 0x00) |
Patrick Georgi | 0e3c59e | 2017-01-28 15:59:25 +0100 | [diff] [blame] | 246 | printk(BIOS_WARNING, "\n%02x: ", i); |
| 247 | printk(BIOS_WARNING, "%02x ", buf[i]); |
| 248 | } |
| 249 | printk(BIOS_WARNING, "\n"); |
Lee Leahy | e20a319 | 2017-03-09 16:21:34 -0800 | [diff] [blame] | 250 | } |
| 251 | return 0; |
Patrick Georgi | 0e3c59e | 2017-01-28 15:59:25 +0100 | [diff] [blame] | 252 | } |
| 253 | #endif |