Kevin Chiu | cc84683 | 2022-12-01 19:58:59 +0800 | [diff] [blame] | 1 | fw_config |
| 2 | field STORAGE 1 1 |
| 3 | option STORAGE_EMMC 0 |
| 4 | option STORAGE_NVME 1 |
| 5 | end |
| 6 | end |
| 7 | |
Kevin Chiu | 5216314 | 2022-10-19 20:14:06 +0800 | [diff] [blame] | 8 | chip soc/intel/alderlake |
Kevin Chiu | 2c351d8 | 2022-11-10 11:13:26 +0800 | [diff] [blame] | 9 | register "sagv" = "SaGv_Enabled" |
Kevin Chiu | 5216314 | 2022-10-19 20:14:06 +0800 | [diff] [blame] | 10 | |
Kevin Chiu | 2c351d8 | 2022-11-10 11:13:26 +0800 | [diff] [blame] | 11 | # Intel Common SoC Config |
| 12 | #+-------------------+---------------------------+ |
| 13 | #| Field | Value | |
| 14 | #+-------------------+---------------------------+ |
| 15 | #| GSPI1 | NC | |
| 16 | #| I2C0 | Audio | |
| 17 | #| I2C1 | cr50 TPM. Early init is | |
| 18 | #| | required to set up a BAR | |
| 19 | #| | for TPM communication | |
| 20 | #| I2C3 | NC | |
| 21 | #| I2C5 | NC | |
| 22 | #+-------------------+---------------------------+ |
| 23 | register "common_soc_config" = "{ |
| 24 | .i2c[0] = { |
| 25 | .speed = I2C_SPEED_FAST, |
Kevin Chiu | 00562eb | 2022-12-19 11:01:06 +0800 | [diff] [blame] | 26 | .rise_time_ns = 600, |
Kevin Chiu | 2c351d8 | 2022-11-10 11:13:26 +0800 | [diff] [blame] | 27 | .fall_time_ns = 400, |
| 28 | .data_hold_time_ns = 50, |
| 29 | }, |
| 30 | .i2c[1] = { |
| 31 | .early_init = 1, |
| 32 | .speed = I2C_SPEED_FAST, |
| 33 | .rise_time_ns = 600, |
| 34 | .fall_time_ns = 400, |
| 35 | .data_hold_time_ns = 50, |
| 36 | }, |
| 37 | }" |
Kevin Chiu | 5216314 | 2022-10-19 20:14:06 +0800 | [diff] [blame] | 38 | |
Kevin Chiu | 2c351d8 | 2022-11-10 11:13:26 +0800 | [diff] [blame] | 39 | register "usb2_ports[0]" = "USB2_PORT_MAX_TYPE_C(OC2)" # set to Max for USB2_C0 |
| 40 | register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable Port 1 |
| 41 | register "usb2_ports[2]" = "USB2_PORT_EMPTY" # Disable Port 2 |
| 42 | register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable Port 3 |
| 43 | register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable Port 4 |
| 44 | |
| 45 | register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A port A0 |
| 46 | register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A port A1(DCI) |
| 47 | register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A port A2 |
| 48 | register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A port A3 |
| 49 | |
| 50 | register "tcss_ports[1]" = "TCSS_PORT_DEFAULT(OC1)" # USB TYPE C |
| 51 | register "tcss_ports[2]" = "TCSS_PORT_EMPTY" # Disable Port2 |
| 52 | |
| 53 | register "serial_io_gspi_mode" = "{ |
| 54 | [PchSerialIoIndexGSPI0] = PchSerialIoDisabled, |
| 55 | [PchSerialIoIndexGSPI1] = PchSerialIoDisabled, |
| 56 | }" |
| 57 | |
| 58 | register "ddi_ports_config" = "{ |
| 59 | [DDI_PORT_A] = DDI_ENABLE_HPD, |
| 60 | [DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC, |
| 61 | [DDI_PORT_1] = DDI_ENABLE_HPD, |
| 62 | [DDI_PORT_3] = DDI_ENABLE_HPD | DDI_ENABLE_DDC, |
| 63 | }" |
| 64 | |
| 65 | device domain 0 on |
| 66 | device ref dtt on |
| 67 | chip drivers/intel/dptf |
| 68 | ## sensor information |
| 69 | register "options.tsr[0].desc" = ""DRAM"" |
| 70 | register "options.tsr[1].desc" = ""Charger"" |
| 71 | |
| 72 | # TODO: below values are initial reference values only |
| 73 | ## Active Policy |
| 74 | register "policies.active" = "{ |
| 75 | [0] = { |
| 76 | .target = DPTF_CPU, |
| 77 | .thresholds = { |
| 78 | TEMP_PCT(85, 90), |
| 79 | TEMP_PCT(80, 80), |
| 80 | TEMP_PCT(75, 70), |
| 81 | } |
| 82 | } |
| 83 | }" |
| 84 | |
| 85 | ## Passive Policy |
| 86 | register "policies.passive" = "{ |
| 87 | [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000), |
| 88 | [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000), |
| 89 | [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 75, 5000), |
| 90 | }" |
| 91 | |
| 92 | ## Critical Policy |
| 93 | register "policies.critical" = "{ |
| 94 | [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), |
| 95 | [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN), |
| 96 | [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN), |
| 97 | }" |
| 98 | |
| 99 | register "controls.power_limits" = "{ |
| 100 | .pl1 = { |
| 101 | .min_power = 3000, |
| 102 | .max_power = 15000, |
| 103 | .time_window_min = 28 * MSECS_PER_SEC, |
| 104 | .time_window_max = 32 * MSECS_PER_SEC, |
| 105 | .granularity = 200, |
| 106 | }, |
| 107 | .pl2 = { |
| 108 | .min_power = 55000, |
| 109 | .max_power = 55000, |
| 110 | .time_window_min = 28 * MSECS_PER_SEC, |
| 111 | .time_window_max = 32 * MSECS_PER_SEC, |
| 112 | .granularity = 1000, |
| 113 | } |
| 114 | }" |
| 115 | |
| 116 | ## Charger Performance Control (Control, mA) |
| 117 | register "controls.charger_perf" = "{ |
| 118 | [0] = { 255, 1700 }, |
| 119 | [1] = { 24, 1500 }, |
| 120 | [2] = { 16, 1000 }, |
| 121 | [3] = { 8, 500 } |
| 122 | }" |
| 123 | |
| 124 | ## Fan Performance Control (Percent, Speed, Noise, Power) |
| 125 | register "controls.fan_perf" = "{ |
| 126 | [0] = { 90, 6700, 220, 2200, }, |
| 127 | [1] = { 80, 5800, 180, 1800, }, |
| 128 | [2] = { 70, 5000, 145, 1450, }, |
| 129 | [3] = { 60, 4900, 115, 1150, }, |
| 130 | [4] = { 50, 3838, 90, 900, }, |
| 131 | [5] = { 40, 2904, 55, 550, }, |
| 132 | [6] = { 30, 2337, 30, 300, }, |
| 133 | [7] = { 20, 1608, 15, 150, }, |
| 134 | [8] = { 10, 800, 10, 100, }, |
| 135 | [9] = { 0, 0, 0, 50, } |
| 136 | }" |
| 137 | |
| 138 | ## Fan options |
| 139 | register "options.fan.fine_grained_control" = "1" |
| 140 | register "options.fan.step_size" = "2" |
| 141 | |
| 142 | device generic 0 alias dptf_policy on end |
| 143 | end |
| 144 | end |
| 145 | device ref pcie4_0 on |
| 146 | # Enable CPU PCIE RP 1 using CLK 0 |
| 147 | register "cpu_pcie_rp[CPU_RP(1)]" = "{ |
| 148 | .clk_req = 0, |
| 149 | .clk_src = 0, |
| 150 | .flags = PCIE_RP_LTR | PCIE_RP_AER, |
| 151 | }" |
Kevin Chiu | cc84683 | 2022-12-01 19:58:59 +0800 | [diff] [blame] | 152 | probe STORAGE STORAGE_NVME |
| 153 | end #NVMe |
Kevin Chiu | 2c351d8 | 2022-11-10 11:13:26 +0800 | [diff] [blame] | 154 | device ref tbt_pcie_rp0 off end |
| 155 | device ref tbt_pcie_rp1 off end |
| 156 | device ref tbt_pcie_rp2 off end |
| 157 | |
| 158 | device ref tcss_dma0 off end |
| 159 | device ref tcss_dma1 off end |
| 160 | device ref cnvi_wifi on |
| 161 | chip drivers/wifi/generic |
| 162 | register "wake" = "GPE0_PME_B0" |
| 163 | device generic 0 on end |
| 164 | end |
| 165 | end |
| 166 | device ref i2c0 on |
| 167 | chip drivers/i2c/generic |
| 168 | register "hid" = ""RTL5682"" |
| 169 | register "name" = ""RT58"" |
| 170 | register "desc" = ""Headset Codec"" |
| 171 | register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)" |
| 172 | # Set the jd_src to RT5668_JD1 for jack detection |
| 173 | register "property_count" = "1" |
| 174 | register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" |
| 175 | register "property_list[0].name" = ""realtek,jd-src"" |
| 176 | register "property_list[0].integer" = "1" |
| 177 | device i2c 1a on end |
| 178 | end |
| 179 | end #I2C0 |
| 180 | device ref i2c1 on |
| 181 | chip drivers/i2c/tpm |
| 182 | register "hid" = ""GOOG0005"" |
| 183 | register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)" |
| 184 | device i2c 50 on end |
| 185 | end |
| 186 | end |
| 187 | device ref pcie_rp7 on |
| 188 | chip drivers/net |
| 189 | register "wake" = "GPE0_DW0_07" |
Robert Chen | 34d2600 | 2023-01-06 20:15:22 -0500 | [diff] [blame] | 190 | register "customized_leds" = "0x060f" |
Kevin Chiu | 2c351d8 | 2022-11-10 11:13:26 +0800 | [diff] [blame] | 191 | register "enable_aspm_l1_2" = "1" |
Robert Chen | c28382e | 2023-01-06 20:50:17 -0500 | [diff] [blame] | 192 | register "add_acpi_dma_property" = "true" |
Matt DeVillier | 5b4bbe5 | 2023-11-19 16:22:21 -0600 | [diff] [blame^] | 193 | device pci 00.0 on end |
Kevin Chiu | 2c351d8 | 2022-11-10 11:13:26 +0800 | [diff] [blame] | 194 | end |
| 195 | end # RTL8111 Ethernet NIC |
| 196 | device ref pcie_rp8 on |
| 197 | chip soc/intel/common/block/pcie/rtd3 |
| 198 | register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)" |
| 199 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D18)" |
| 200 | register "srcclk_pin" = "3" |
| 201 | device generic 0 on end |
| 202 | end |
| 203 | end #PCIE8 SD card |
| 204 | device ref pcie_rp12 on |
| 205 | # Enable PCIE eMMC bridge 12 using clk 4 |
| 206 | register "pch_pcie_rp[PCH_RP(12)]" = "{ |
| 207 | .clk_src = 4, |
| 208 | .clk_req = 4, |
| 209 | .flags = PCIE_RP_HOTPLUG | PCIE_RP_AER, |
| 210 | }" |
Kevin Chiu | cc84683 | 2022-12-01 19:58:59 +0800 | [diff] [blame] | 211 | probe STORAGE STORAGE_EMMC |
Kevin Chiu | 2c351d8 | 2022-11-10 11:13:26 +0800 | [diff] [blame] | 212 | end #PCIE12 EMMC |
| 213 | device ref gspi1 off end |
| 214 | device ref pch_espi on |
| 215 | chip ec/google/chromeec |
| 216 | use conn0 as mux_conn[0] |
| 217 | device pnp 0c09.0 on end |
| 218 | end |
| 219 | end |
| 220 | device ref pmc hidden |
| 221 | chip drivers/intel/pmc_mux |
| 222 | device generic 0 on |
| 223 | chip drivers/intel/pmc_mux/conn |
| 224 | use usb2_port1 as usb2_port |
| 225 | use tcss_usb3_port1 as usb3_port |
| 226 | device generic 0 alias conn0 on end |
| 227 | end |
| 228 | end |
| 229 | end |
| 230 | end |
| 231 | device ref tcss_xhci on |
| 232 | chip drivers/usb/acpi |
| 233 | device ref tcss_root_hub on |
| 234 | chip drivers/usb/acpi |
| 235 | register "desc" = ""USB3 Type-C Port C0 (MLB)"" |
| 236 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 237 | register "use_custom_pld" = "true" |
| 238 | register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, RIGHT, ACPI_PLD_GROUP(1, 1))" |
| 239 | device ref tcss_usb3_port1 on end |
| 240 | end |
| 241 | end |
| 242 | end |
| 243 | end |
| 244 | device ref xhci on |
| 245 | chip drivers/usb/acpi |
| 246 | device ref xhci_root_hub on |
| 247 | chip drivers/usb/acpi |
| 248 | register "desc" = ""USB2 Type-C Port C0 (MLB)"" |
| 249 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 250 | register "use_custom_pld" = "true" |
| 251 | register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, RIGHT, ACPI_PLD_GROUP(1, 1))" |
| 252 | device ref usb2_port1 on end |
| 253 | end |
| 254 | chip drivers/usb/acpi |
| 255 | register "desc" = ""USB2 Type-A Port A3 (MLB)"" |
| 256 | register "type" = "UPC_TYPE_A" |
| 257 | register "use_custom_pld" = "true" |
| 258 | register "custom_pld" = "ACPI_PLD_TYPE_A(BACK, LEFT, ACPI_PLD_GROUP(5, 1))" |
| 259 | device ref usb2_port6 on end |
| 260 | end |
| 261 | chip drivers/usb/acpi |
| 262 | register "desc" = ""USB2 Type-A Port A2 (MLB)"" |
| 263 | register "type" = "UPC_TYPE_A" |
| 264 | register "use_custom_pld" = "true" |
| 265 | register "custom_pld" = "ACPI_PLD_TYPE_A(BACK, CENTER, ACPI_PLD_GROUP(6, 1))" |
| 266 | device ref usb2_port7 on end |
| 267 | end |
| 268 | chip drivers/usb/acpi |
| 269 | register "desc" = ""USB2 Type-A Port A1 (MLB)"" |
| 270 | register "type" = "UPC_TYPE_A" |
| 271 | register "use_custom_pld" = "true" |
| 272 | register "custom_pld" = "ACPI_PLD_TYPE_A(FRONT, LEFT, ACPI_PLD_GROUP(4, 1))" |
| 273 | device ref usb2_port8 on end |
| 274 | end |
| 275 | chip drivers/usb/acpi |
| 276 | register "desc" = ""USB2 Type-A Port A0 (MLB)"" |
| 277 | register "type" = "UPC_TYPE_A" |
| 278 | register "use_custom_pld" = "true" |
| 279 | register "custom_pld" = "ACPI_PLD_TYPE_A(FRONT, RIGHT, ACPI_PLD_GROUP(1, 2))" |
| 280 | device ref usb2_port9 on end |
| 281 | end |
| 282 | chip drivers/usb/acpi |
| 283 | register "desc" = ""USB2 Bluetooth"" |
| 284 | register "type" = "UPC_TYPE_INTERNAL" |
| 285 | register "reset_gpio" = |
| 286 | "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)" |
| 287 | device ref usb2_port10 on end |
| 288 | end |
| 289 | chip drivers/usb/acpi |
| 290 | register "desc" = ""USB3 Type-A Port A0 (MLB)"" |
| 291 | register "type" = "UPC_TYPE_USB3_A" |
| 292 | register "use_custom_pld" = "true" |
| 293 | register "custom_pld" = "ACPI_PLD_TYPE_A(FRONT, RIGHT, ACPI_PLD_GROUP(1, 2))" |
| 294 | device ref usb3_port1 on end |
| 295 | end |
| 296 | chip drivers/usb/acpi |
| 297 | register "desc" = ""USB3 Type-A Port A1 (MLB)"" |
| 298 | register "type" = "UPC_TYPE_USB3_A" |
| 299 | register "use_custom_pld" = "true" |
| 300 | register "custom_pld" = "ACPI_PLD_TYPE_A(FRONT, LEFT, ACPI_PLD_GROUP(4, 1))" |
| 301 | device ref usb3_port2 on end |
| 302 | end |
| 303 | chip drivers/usb/acpi |
| 304 | register "desc" = ""USB3 Type-A Port A2 (MLB)"" |
| 305 | register "type" = "UPC_TYPE_USB3_A" |
| 306 | register "use_custom_pld" = "true" |
| 307 | register "custom_pld" = "ACPI_PLD_TYPE_A(BACK, CENTER, ACPI_PLD_GROUP(6, 1))" |
| 308 | device ref usb3_port3 on end |
| 309 | end |
| 310 | chip drivers/usb/acpi |
| 311 | register "desc" = ""USB3 Type-A Port A3 (MLB)"" |
| 312 | register "type" = "UPC_TYPE_USB3_A" |
| 313 | register "use_custom_pld" = "true" |
| 314 | register "custom_pld" = "ACPI_PLD_TYPE_A(BACK, LEFT, ACPI_PLD_GROUP(5, 1))" |
| 315 | device ref usb3_port4 on end |
| 316 | end |
| 317 | end |
| 318 | end |
| 319 | end |
| 320 | end |
Kevin Chiu | 5216314 | 2022-10-19 20:14:06 +0800 | [diff] [blame] | 321 | end |