blob: 571810313e129958d3823f437ee1ff9a05e2c337 [file] [log] [blame]
Angel Pons585495e2020-04-03 01:21:38 +02001/* SPDX-License-Identifier: GPL-2.0-only */
2/* This file is part of the coreboot project. */
Julius Wernerec5e5e02014-08-20 15:29:56 -07003
4#include <memlayout.h>
Julius Wernerec5e5e02014-08-20 15:29:56 -07005#include <arch/header.ld>
Patrick Rudolphc6ba36f2019-06-12 09:48:31 +02006#include <mainboard/addressmap.h>
Julius Wernerec5e5e02014-08-20 15:29:56 -07007
Patrick Rudolph8a48c922019-06-12 16:22:11 +02008// Stages start after CBFS in DRAM
Patrick Rudolphc6ba36f2019-06-12 09:48:31 +02009#define STAGES_START (QEMU_VIRT_DRAM + CONFIG_ROM_SIZE)
Philipp Hug2ef569a2018-12-31 14:13:47 +010010
Julius Wernerec5e5e02014-08-20 15:29:56 -070011SECTIONS
12{
Patrick Rudolph8a48c922019-06-12 16:22:11 +020013 // the virt target doesn't emulate flash and just puts the CBFS into DRAM.
14 // fake SRAM where CBFS resides. It's only done for better integration.
15 SRAM_START(QEMU_VIRT_DRAM)
Patrick Rudolphc6ba36f2019-06-12 09:48:31 +020016 BOOTBLOCK(QEMU_VIRT_DRAM, 64K)
17 // CBFS goes here
Patrick Rudolph8a48c922019-06-12 16:22:11 +020018 SRAM_END(STAGES_START)
19 DRAM_START(STAGES_START)
20
21#if ENV_ROMSTAGE
22 ROMSTAGE(STAGES_START, 128K)
23#endif
Patrick Rudolph871d2c72019-07-05 19:41:24 +020024#if ENV_RAMSTAGE
25 REGION(opensbi, STAGES_START, 128K, 4K)
26#endif
Patrick Rudolph8a48c922019-06-12 16:22:11 +020027 PRERAM_CBMEM_CONSOLE(STAGES_START + 128K, 8K)
Julius Werner8245bd22019-12-04 20:32:15 -080028 FMAP_CACHE(STAGES_START + 136K, 2K)
Patrick Rudolphc6ba36f2019-06-12 09:48:31 +020029 RAMSTAGE(STAGES_START + 200K, 16M)
Patrick Rudolph8a48c922019-06-12 16:22:11 +020030 STACK(STAGES_START + 200K + 16M, 4K)
Julius Wernerec5e5e02014-08-20 15:29:56 -070031}