| Angel Pons | 585495e | 2020-04-03 01:21:38 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* This file is part of the coreboot project. */ |
| Ronald G. Minnich | 9831244 | 2016-02-12 22:37:48 +0000 | [diff] [blame] | 3 | |
| 4 | #include <cbmem.h> |
| 5 | |
| Arthur Heymans | 340e4b8 | 2019-10-23 17:25:58 +0200 | [diff] [blame] | 6 | void *cbmem_top_chipset(void) |
| Ronald G. Minnich | 9831244 | 2016-02-12 22:37:48 +0000 | [diff] [blame] | 7 | { |
| 8 | /* Top of cbmem is at lowest usable DRAM address below 4GiB. */ |
| 9 | /* For now, last 1M of 4G */ |
| 10 | void *ptr = (void *) ((1ULL << 32) - 1048576); |
| 11 | return ptr; |
| 12 | } |