| Mike Loptien | 573a1d6 | 2013-03-18 11:19:26 -0600 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2011 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | Device(LIBR) { |
| 21 | Name(_ADR, 0x00140003) |
| 22 | /* Method(_INI) { |
| 23 | * DBGO("\\_SB\\PCI0\\LpcIsaBr\\_INI\n") |
| 24 | } */ /* End Method(_SB.SBRDG._INI) */ |
| 25 | |
| 26 | /* Real Time Clock Device */ |
| 27 | Device(RTC0) { |
| 28 | Name(_HID, EISAID("PNP0B00")) /* AT Real Time Clock (not PIIX4 compatible) */ |
| 29 | Name(_CRS, ResourceTemplate() { |
| 30 | IRQNoFlags(){8} |
| 31 | IO(Decode16,0x0070, 0x0070, 0, 2) |
| 32 | /* IO(Decode16,0x0070, 0x0070, 0, 4) */ |
| 33 | }) |
| 34 | } /* End Device(_SB.PCI0.LpcIsaBr.RTC0) */ |
| 35 | |
| 36 | Device(TMR) { /* Timer */ |
| 37 | Name(_HID,EISAID("PNP0100")) /* System Timer */ |
| 38 | Name(_CRS, ResourceTemplate() { |
| 39 | IRQNoFlags(){0} |
| 40 | IO(Decode16, 0x0040, 0x0040, 0, 4) |
| 41 | /* IO(Decode16, 0x0048, 0x0048, 0, 4) */ |
| 42 | }) |
| 43 | } /* End Device(_SB.PCI0.LpcIsaBr.TMR) */ |
| 44 | |
| 45 | Device(SPKR) { /* Speaker */ |
| 46 | Name(_HID,EISAID("PNP0800")) /* AT style speaker */ |
| 47 | Name(_CRS, ResourceTemplate() { |
| 48 | IO(Decode16, 0x0061, 0x0061, 0, 1) |
| 49 | }) |
| 50 | } /* End Device(_SB.PCI0.LpcIsaBr.SPKR) */ |
| 51 | |
| 52 | Device(PIC) { |
| 53 | Name(_HID,EISAID("PNP0000")) /* AT Interrupt Controller */ |
| 54 | Name(_CRS, ResourceTemplate() { |
| 55 | IRQNoFlags(){2} |
| 56 | IO(Decode16,0x0020, 0x0020, 0, 2) |
| 57 | IO(Decode16,0x00A0, 0x00A0, 0, 2) |
| 58 | /* IO(Decode16, 0x00D0, 0x00D0, 0x10, 0x02) */ |
| 59 | /* IO(Decode16, 0x04D0, 0x04D0, 0x10, 0x02) */ |
| 60 | }) |
| 61 | } /* End Device(_SB.PCI0.LpcIsaBr.PIC) */ |
| 62 | |
| 63 | Device(MAD) { /* 8257 DMA */ |
| 64 | Name(_HID,EISAID("PNP0200")) /* Hardware Device ID */ |
| 65 | Name(_CRS, ResourceTemplate() { |
| 66 | DMA(Compatibility,BusMaster,Transfer8){4} |
| 67 | IO(Decode16, 0x0000, 0x0000, 0x10, 0x10) |
| 68 | IO(Decode16, 0x0081, 0x0081, 0x01, 0x03) |
| 69 | IO(Decode16, 0x0087, 0x0087, 0x01, 0x01) |
| 70 | IO(Decode16, 0x0089, 0x0089, 0x01, 0x03) |
| 71 | IO(Decode16, 0x008F, 0x008F, 0x01, 0x01) |
| 72 | IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20) |
| 73 | }) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */ |
| 74 | } /* End Device(_SB.PCI0.LpcIsaBr.MAD) */ |
| 75 | |
| 76 | Device(COPR) { |
| 77 | Name(_HID,EISAID("PNP0C04")) /* Math Coprocessor */ |
| 78 | Name(_CRS, ResourceTemplate() { |
| 79 | IO(Decode16, 0x00F0, 0x00F0, 0, 0x10) |
| 80 | IRQNoFlags(){13} |
| 81 | }) |
| 82 | } /* End Device(_SB.PCI0.LpcIsaBr.COPR) */ |
| 83 | #include "acpi/superio.asl" |
| 84 | } /* end LIBR */ |
| 85 | |