| Mike Loptien | 573a1d6 | 2013-03-18 11:19:26 -0600 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2011 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | /* Note: Only need HID on Primary Bus */ |
| 21 | External (TOM1) |
| 22 | External (TOM2) |
| 23 | Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */ |
| 24 | Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */ |
| 25 | Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ |
| 26 | |
| 27 | /* Describe the Northbridge devices */ |
| 28 | Device(AMRT) { |
| 29 | Name(_ADR, 0x00000000) |
| 30 | } /* end AMRT */ |
| 31 | |
| 32 | /* The internal GFX bridge */ |
| 33 | Device(AGPB) { |
| 34 | Name(_ADR, 0x00010000) |
| 35 | Name(_PRW, Package() {0x18, 4}) |
| 36 | Method(_PRT,0) { |
| 37 | If(PMOD){ Return(APR1) } /* APIC mode */ |
| 38 | Return (PR1) /* PIC Mode */ |
| 39 | } |
| 40 | } /* end AGPB */ |
| 41 | |
| 42 | /* The internal GFX bridge */ |
| 43 | Device(HDMI) { |
| 44 | Name(_ADR, 0x00010001) |
| 45 | Name(_PRW, Package() {0x18, 4}) |
| 46 | Method(_PRT,0) { |
| 47 | If(PMOD){ Return(APR1) } /* APIC mode */ |
| 48 | Return (PR1) /* PIC Mode */ |
| 49 | } |
| 50 | } /* end HDMI */ |
| 51 | |
| 52 | /* Dev 2 & 3 are external GFX bridges, not used in Family14 */ |
| 53 | |
| 54 | /* Dev4 GPP0 Root Port Bridge */ |
| 55 | Device(PBR4) { |
| 56 | Name(_ADR, 0x00040000) |
| 57 | Name(_PRW, Package() {0x18, 4}) |
| 58 | Method(_PRT,0) { |
| 59 | If(PMOD){ Return(APS4) } /* APIC mode */ |
| 60 | Return (PS4) /* PIC Mode */ |
| 61 | } /* end _PRT */ |
| 62 | } /* end PBR4 */ |
| 63 | |
| 64 | /* Dev5 GPP1 Root Port Bridge */ |
| 65 | Device(PBR5) { |
| 66 | Name(_ADR, 0x00050000) |
| 67 | Name(_PRW, Package() {0x18, 4}) |
| 68 | Method(_PRT,0) { |
| 69 | If(PMOD){ Return(APS5) } /* APIC mode */ |
| 70 | Return (PS5) /* PIC Mode */ |
| 71 | } /* end _PRT */ |
| 72 | } /* end PBR5 */ |
| 73 | |
| 74 | /* Dev6 GPP2 Root Port Bridge */ |
| 75 | Device(PBR6) { |
| 76 | Name(_ADR, 0x00060000) |
| 77 | Name(_PRW, Package() {0x18, 4}) |
| 78 | Method(_PRT,0) { |
| 79 | If(PMOD){ Return(APS6) } /* APIC mode */ |
| 80 | Return (PS6) /* PIC Mode */ |
| 81 | } /* end _PRT */ |
| 82 | } /* end PBR6 */ |
| 83 | |
| 84 | /* The onboard EtherNet chip */ |
| 85 | Device(PBR7) { |
| 86 | Name(_ADR, 0x00070000) |
| 87 | Name(_PRW, Package() {0x18, 4}) |
| 88 | Method(_PRT,0) { |
| 89 | If(PMOD){ Return(APS7) } /* APIC mode */ |
| 90 | Return (PS7) /* PIC Mode */ |
| 91 | } /* end _PRT */ |
| 92 | } /* end PBR7 */ |
| 93 | |
| 94 | Device(PE20) { |
| 95 | Name(_ADR, 0x00150000) |
| 96 | Name(_PRW, Package() {0x18, 4}) |
| 97 | Method(_PRT,0) { |
| 98 | If(PMOD){ Return(APE0) } /* APIC mode */ |
| 99 | Return (PE0) /* PIC Mode */ |
| 100 | } /* end _PRT */ |
| 101 | } /* end PE20 */ |
| 102 | |
| 103 | Device(PE21) { |
| 104 | Name(_ADR, 0x00150001) |
| 105 | Name(_PRW, Package() {0x18, 4}) |
| 106 | Method(_PRT,0) { |
| 107 | If(PMOD){ Return(APE1) } /* APIC mode */ |
| 108 | Return (PE1) /* PIC Mode */ |
| 109 | } /* end _PRT */ |
| 110 | } /* end PE21 */ |
| 111 | |
| 112 | Device(PE22) { |
| 113 | Name(_ADR, 0x00150002) |
| 114 | Name(_PRW, Package() {0x18, 4}) |
| 115 | Method(_PRT,0) { |
| 116 | If(PMOD){ Return(APE2) } /* APIC mode */ |
| 117 | Return (APE2) /* PIC Mode */ |
| 118 | } /* end _PRT */ |
| 119 | } /* end PE22 */ |
| 120 | |
| 121 | Device(PE23) { |
| 122 | Name(_ADR, 0x00150003) |
| 123 | Name(_PRW, Package() {0x18, 4}) |
| 124 | Method(_PRT,0) { |
| 125 | If(PMOD){ Return(APE3) } /* APIC mode */ |
| 126 | Return (PE3) /* PIC Mode */ |
| 127 | } /* end _PRT */ |
| 128 | } /* end PE23 */ |
| 129 | |
| 130 | |