blob: 1afa92b5816c8c6fa527ef81d2c1d0da404ee004 [file] [log] [blame]
Angel Ponsc200e8c72020-10-23 21:37:21 +02001bootblock-y += bootblock.c
2
3ramstage-y += adsp.c
4romstage-y += early_pch.c
5ramstage-$(CONFIG_ELOG) += elog.c
Angel Pons071754c2020-10-23 22:35:41 +02006ramstage-y += finalize.c
Angel Pons9cf9b852021-01-28 17:26:07 +01007ramstage-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c
8romstage-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c
9smm-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c
Angel Ponsc200e8c72020-10-23 21:37:21 +020010ramstage-y += hda.c
Angel Pons50811e22021-03-18 16:53:00 +010011ramstage-y += ../../../../southbridge/intel/lynxpoint/hda_verb.c
Angel Ponsc423ce22021-04-19 16:13:31 +020012ramstage-y += ../../../../southbridge/intel/lynxpoint/iobp.c
13romstage-y += ../../../../southbridge/intel/lynxpoint/iobp.c
Angel Ponsc200e8c72020-10-23 21:37:21 +020014ramstage-y += fadt.c
15ramstage-y += lpc.c
16ramstage-y += me.c
17ramstage-y += me_status.c
18romstage-y += me_status.c
19ramstage-y += pch.c
20romstage-y += pch.c
21ramstage-y += pcie.c
22ramstage-y += pmutil.c
23romstage-y += pmutil.c
24smm-y += pmutil.c
25verstage-y += pmutil.c
26romstage-y += power_state.c
Angel Pons0a45b402021-01-26 19:28:28 +010027ramstage-y += ramstage.c
Angel Ponsc200e8c72020-10-23 21:37:21 +020028ramstage-y += sata.c
29ramstage-y += serialio.c
Angel Pons8af3e0e2021-03-03 16:55:01 +010030ramstage-y += ../../../../southbridge/intel/lynxpoint/smbus.c
Angel Ponsc200e8c72020-10-23 21:37:21 +020031ramstage-y += smi.c
32smm-y += smihandler.c
Angel Ponsc200e8c72020-10-23 21:37:21 +020033bootblock-y += usb_debug.c
34romstage-y += usb_debug.c
35ramstage-y += usb_debug.c
Angel Ponsb9338ba2021-03-03 17:16:54 +010036ramstage-y += usb_ehci.c
37ramstage-y += usb_xhci.c
38smm-y += usb_xhci.c
Angel Ponsc200e8c72020-10-23 21:37:21 +020039
Angel Pons07baa7a2021-04-19 17:12:42 +020040bootblock-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxpoint/iobp.c
41bootblock-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxpoint/uart_init.c
42all-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxpoint/uart.c
43smm-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxpoint/uart.c
44
Angel Ponsc200e8c72020-10-23 21:37:21 +020045ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c