blob: 26e79ca39aacbe8d4658634c3917016480a80c67 [file] [log] [blame]
Jonathan A. Kollasche1ffd9e2013-10-15 14:26:34 -05001#include <console/console.h>
2#include <arch/smp/mpspec.h>
3#include <device/pci.h>
4#include <string.h>
5#include <stdint.h>
6#include <cpu/amd/amdk8_sysconf.h>
7
8extern unsigned char bus_ck804_0; //1
9extern unsigned char bus_ck804_1; //2
10extern unsigned char bus_ck804_2; //3
11extern unsigned char bus_ck804_3; //4
12extern unsigned char bus_ck804_4; //5
13extern unsigned char bus_ck804_5; //6
Jonathan A. Kollasche1ffd9e2013-10-15 14:26:34 -050014extern unsigned apicid_ck804;
Jonathan A. Kollasche1ffd9e2013-10-15 14:26:34 -050015
Jonathan A. Kollasche1ffd9e2013-10-15 14:26:34 -050016
17static void *smp_write_config_table(void *v)
18{
19 struct mp_config_table *mc;
20 unsigned sbdn;
21 int i, bus_isa;
22
23 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
24
25 mptable_init(mc, LOCAL_APIC_ADDR);
26
27 smp_write_processors(mc);
28
29 get_bus_conf();
30 sbdn = sysconf.sbdn;
31
32 mptable_write_buses(mc, NULL, &bus_isa);
33
34/*I/O APICs: APIC ID Version State Address*/
35 {
36 device_t dev;
37 struct resource *res;
38 uint32_t dword;
39
40 dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn+ 0x1,0));
41 if (dev) {
42 res = find_resource(dev, PCI_BASE_ADDRESS_1);
43 if (res) {
44 smp_write_ioapic(mc, apicid_ck804, 0x11, res->base);
45 }
46
47 /* Initialize interrupt mapping*/
48
49 dword = 0x0120d218;
50 pci_write_config32(dev, 0x7c, dword);
51
52 dword = 0x12008a00;
53 pci_write_config32(dev, 0x80, dword);
54
55 dword = 0x0000007d;
56 pci_write_config32(dev, 0x84, dword);
Jonathan A. Kollasche1ffd9e2013-10-15 14:26:34 -050057 }
58
59 }
60
61 mptable_add_isa_interrupts(mc, bus_isa, apicid_ck804, 1);
62
63// Onboard ck804 smbus
64 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+1)<<2)|1, apicid_ck804, 0xa); // 10
65
66// Onboard ck804 USB 1.1
67 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+2)<<2)|0, apicid_ck804, 0x15); // 21
68
69// Onboard ck804 USB 2
70 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+2)<<2)|1, apicid_ck804, 0x14); // 20
71
72// Onboard ck804 SATA 0
73 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn +7)<<2)|0, apicid_ck804, 0x17); // 23
74
75// Onboard ck804 SATA 1
76 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn +8)<<2)|0, apicid_ck804, 0x16); // 22
77
78//Slot PCIE x16
79 for(i=0;i<4;i++) {
80 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_5, (0x00<<2)|i, apicid_ck804, 0x10 + (2+i+4-sbdn%4)%4);
81 }
82
83//Slot PCIE x4
84 for(i=0;i<4;i++) {
85 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_4, (0x00<<2)|i, apicid_ck804, 0x10 + (1+i+4-sbdn%4)%4);
86 }
87
Jonathan A. Kollasch553fe1c2013-10-15 16:45:51 -050088//Onboard SM720 VGA
89 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_1, (6<<2)|0, apicid_ck804, 0x13); // 19
Jonathan A. Kollasche1ffd9e2013-10-15 14:26:34 -050090
91/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
92 mptable_lintsrc(mc, bus_isa);
93 /* There is no extension information... */
94
95 /* Compute the checksums */
96 return mptable_finalize(mc);
97}
98
99unsigned long write_smp_table(unsigned long addr)
100{
101 void *v;
102 v = smp_write_floating_table(addr, 0);
103 return (unsigned long)smp_write_config_table(v);
104}