blob: f40b52beec32110075431ed888064827ed81e839 [file] [log] [blame]
Kevin Chiu2649f5a2021-11-15 20:45:19 +08001fw_config
2 field DB_SD 0 1
3 option SD_ABSENT 0
4 option SD_GL9750 1
5 end
6 field KB_BL 2 2
7 option KB_BL_ABSENT 0
8 option KB_BL_PRESENT 1
9 end
10 field AUDIO 3 5
11 option AUDIO_UNKNOWN 0
12 option MAX98360_ALC5682I_I2S 1
13 option MAX98360_ALC5682IVS_I2S 2
14 end
15 field DB_LTE 6 7
16 option LTE_ABSENT 0
17 option LTE_USB 1
18 end
19 field EPS 10 10
20 option PRIVACY_SCREEN_ABSENT 0
21 option PRIVACY_SCREEN 1
22 end
23end
Shon Wangb8f05392021-11-12 14:10:31 +080024chip soc/intel/alderlake
Kevin Chiu2649f5a2021-11-15 20:45:19 +080025 # Intel Common SoC Config
26 #+-------------------+---------------------------+
27 #| Field | Value |
28 #+-------------------+---------------------------+
29 #| GSPI1 | Fingerprint MCU |
30 #| I2C0 | Audio |
Shon Wang138f5472021-12-14 20:41:48 +080031 #| I2C1 | cr50 TPM. Early init is |
Kevin Chiu2649f5a2021-11-15 20:45:19 +080032 #| | required to set up a BAR |
33 #| | for TPM communication |
Shon Wang138f5472021-12-14 20:41:48 +080034 #| I2C2 | |
35 #| I2C3 | Touchscreen |
Kevin Chiu2649f5a2021-11-15 20:45:19 +080036 #| I2C5 | Trackpad |
37 #+-------------------+---------------------------+
Shon Wang138f5472021-12-14 20:41:48 +080038 register "common_soc_config" = "{
Eddy Lu15a33fd2022-03-30 11:55:18 +080039 .i2c[0] = {
40 .speed = I2C_SPEED_FAST_PLUS,
41 .speed_config[0] = {
42 .speed = I2C_SPEED_FAST_PLUS,
43 .scl_lcnt = 45,
44 .scl_hcnt = 33,
45 .sda_hold = 20,
46 },
47 },
Shon Wang138f5472021-12-14 20:41:48 +080048 .i2c[1] = {
49 .early_init = 1,
50 .speed = I2C_SPEED_FAST,
51 .rise_time_ns = 600,
52 .fall_time_ns = 400,
53 .data_hold_time_ns = 50,
54 },
55 .i2c[3] = {
56 .rise_time_ns = 650,
57 .fall_time_ns = 400,
58 .data_hold_time_ns = 50,
59 },
Shon Wangfdfa22e2022-05-24 15:52:54 +080060 .i2c[7] = {
61 .speed = I2C_SPEED_FAST_PLUS,
62 .speed_config[0] = {
63 .speed = I2C_SPEED_FAST_PLUS,
64 .scl_lcnt = 45,
65 .scl_hcnt = 30,
66 .sda_hold = 20,
67 },
68 },
Shon Wang138f5472021-12-14 20:41:48 +080069 }"
Shon Wangb5106702021-12-20 16:04:46 +080070 register "usb2_ports[4]" = "USB2_PORT_TYPE_C(OC3)" # USB2_C3
Daisuke Nojiric3dab9c2022-01-10 10:41:17 -080071 register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)"
Shon8f6dd2a2022-05-24 16:12:11 +080072 register "usb2_ports[8]" = "USB2_PORT_EMPTY"
73
74 register "usb3_ports[0]" = "USB3_PORT_EMPTY"
75
Gaggery Tsai2f4246a2022-04-25 22:10:32 -070076 register "tcss_ports[3]" = "TCSS_PORT_DEFAULT(OC3)"
MAULIK V VAGHELA215a97e2022-03-07 18:39:17 +053077 register "sagv" = "SaGv_Enabled"
Shon Wangb5106702021-12-20 16:04:46 +080078
Robert Chen161e7312022-04-07 16:10:31 +080079 # FIVR RFI Spread Spectrum 6%
80 register "fivr_spread_spectrum" = "FIVR_SS_6"
81
=0617d5a2021-12-14 15:20:43 +080082 # I2C Port Config
MAULIK V VAGHELA215a97e2022-03-07 18:39:17 +053083 register "serial_io_i2c_mode" = "{
=0617d5a2021-12-14 15:20:43 +080084 [PchSerialIoIndexI2C0] = PchSerialIoPci,
85 [PchSerialIoIndexI2C1] = PchSerialIoPci,
86 [PchSerialIoIndexI2C2] = PchSerialIoPci,
87 [PchSerialIoIndexI2C3] = PchSerialIoPci,
88 [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
89 [PchSerialIoIndexI2C5] = PchSerialIoPci,
Shon Wangfdfa22e2022-05-24 15:52:54 +080090 [PchSerialIoIndexI2C7] = PchSerialIoPci,
=0617d5a2021-12-14 15:20:43 +080091 }"
Kevin Chiu2649f5a2021-11-15 20:45:19 +080092 device domain 0 on
93 device ref igpu on
94 chip drivers/gfx/generic
95 register "device_count" = "1"
96 register "device[0].name" = ""LCD""
97 # Use Chrome OS privacy screen _HID
98 register "device[0].hid" = ""GOOG0010""
99 # Internal panel on the first port of the graphics chip
100 register "device[0].addr" = "0x80010400"
101 register "device[0].privacy.enabled" = "1"
102 register "device[0].privacy.gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H21)"
103 device generic 0 on
104 probe EPS PRIVACY_SCREEN
105 end
106 end
107 end # Integrated Graphics Device
108 device ref dtt on
109 chip drivers/intel/dptf
110 ## sensor information
111 register "options.tsr[0].desc" = ""DRAM""
112 register "options.tsr[1].desc" = ""Soc""
113 register "options.tsr[2].desc" = ""Charger""
114 register "options.tsr[3].desc" = ""Regulator""
115 # TODO: below values are initial reference values only
116 ## Passive Policy
117 register "policies.passive" = "{
118 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
119 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000),
120 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 5000),
121 [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000),
122 [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 75, 5000),
123 }"
124 ## Critical Policy
125 register "policies.critical" = "{
126 [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
127 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
128 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
129 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN),
130 [4] = DPTF_CRITICAL(TEMP_SENSOR_3, 85, SHUTDOWN),
131 }"
132 register "controls.power_limits" = "{
133 .pl1 = {
134 .min_power = 3000,
135 .max_power = 15000,
136 .time_window_min = 28 * MSECS_PER_SEC,
137 .time_window_max = 32 * MSECS_PER_SEC,
138 .granularity = 200,
139 },
140 .pl2 = {
141 .min_power = 55000,
142 .max_power = 55000,
143 .time_window_min = 28 * MSECS_PER_SEC,
144 .time_window_max = 32 * MSECS_PER_SEC,
145 .granularity = 1000,
146 }
147 }"
148 ## Charger Performance Control (Control, mA)
149 register "controls.charger_perf" = "{
150 [0] = { 255, 1700 },
151 [1] = { 24, 1500 },
152 [2] = { 16, 1000 },
153 [3] = { 8, 500 }
154 }"
155 device generic 0 on end
156 end
157 end
Shon Wangf00680a2021-12-21 17:41:19 +0800158 device ref ipu on
159 chip drivers/intel/mipi_camera
160 register "acpi_uid" = "0x50000"
161 register "acpi_name" = ""IPU0""
162 register "device_type" = "INTEL_ACPI_CAMERA_CIO2"
163
164 register "cio2_num_ports" = "1"
165 register "cio2_lanes_used" = "{4}" # 4 CSI Camera lanes are used
166 register "cio2_lane_endpoint[0]" = ""^I2C2.CAM0""
Shon Wangd91a6842022-02-15 09:52:40 +0800167 register "cio2_prt[0]" = "1"
Shon Wangf00680a2021-12-21 17:41:19 +0800168 device generic 0 on end
169 end
170 end
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800171 device ref pcie4_0 on
=e061fbf2021-12-14 15:27:01 +0800172 # Enable CPU PCIE RP 1 using CLK 1
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800173 register "cpu_pcie_rp[CPU_RP(1)]" = "{
174 .clk_req = 1,
=e061fbf2021-12-14 15:27:01 +0800175 .clk_src = 1,
Tracy Wuec877d62022-01-13 21:53:02 +0800176 .flags = PCIE_RP_LTR | PCIE_RP_AER,
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800177 }"
178 end
Gaggery Tsai2f4246a2022-04-25 22:10:32 -0700179 device ref tbt_pcie_rp3 on end
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800180 device ref cnvi_wifi on
181 chip drivers/wifi/generic
182 register "wake" = "GPE0_PME_B0"
183 device generic 0 on end
184 end
185 end
Robert Chen977282f2022-03-14 11:17:01 +0800186 device ref pcie_rp6 on
187 # Enable WWAN PCIE 6 using clk 5
188 register "pch_pcie_rp[PCH_RP(6)]" = "{
189 .clk_src = 5,
190 .clk_req = 5,
191 .flags = PCIE_RP_LTR | PCIE_RP_AER,
192 }"
193 chip soc/intel/common/block/pcie/rtd3
194 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)"
195 register "reset_off_delay_ms" = "20"
196 register "srcclk_pin" = "5"
197 register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL"
198 register "skip_on_off_support" = "true"
199 device generic 0 alias rp6_rtd3 on end
200 end
201 chip drivers/wwan/fm
202 register "fcpo_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F21)"
203 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E16)"
204 register "perst_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)"
205 register "wake_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A7)"
206 register "add_acpi_dma_property" = "true"
207 use rp6_rtd3 as rtd3dev
Robert Chencfe92532022-02-11 15:45:26 +0800208 device generic 0 alias rp6_wwan on end
Robert Chen977282f2022-03-14 11:17:01 +0800209 end
210 end
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800211 device ref pcie_rp8 off end
212 device ref pcie_rp9 off end
213 device ref tcss_dma0 on
214 chip drivers/intel/usb4/retimer
215 register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"
216 use tcss_usb3_port1 as dfp[0].typec_port
217 device generic 0 on end
218 end
219 end
220 device ref tcss_dma1 on
221 chip drivers/intel/usb4/retimer
222 register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"
223 use tcss_usb3_port3 as dfp[0].typec_port
224 device generic 0 on end
225 end
226 end
227 device ref i2c0 on
Shon Wang8d296b12021-12-24 10:45:15 +0800228 chip drivers/i2c/cs35l53
Shon Wang8d296b12021-12-24 10:45:15 +0800229 register "name" = ""SPK2""
eddylu@ami.corp-partner.google.com54516672022-05-19 11:47:37 +0800230 register "sub" = ""103CA221""
231 register "desc" = ""Cirrus Logic CS35L53 Tweeter Right Audio Codec""
232 register "uid" = "3"
Shon Wang8d296b12021-12-24 10:45:15 +0800233 register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_D14)"
eddylu@ami.corp-partner.google.com54516672022-05-19 11:47:37 +0800234 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
Shon Wang8d296b12021-12-24 10:45:15 +0800235 register "boost_type" = "EXTERNAL_BOOST"
236 register "asp_sdout_hiz" = "ASP_SDOUT_LOGIC0_UNUSED_LOGIC0_DISABLED"
237 register "gpio1_output_enable" = "true"
238 register "gpio1_src_select" = "GPIO1_SRC_GPIO"
239 register "gpio2_src_select" = "GPIO2_SRC_HIGH_IMPEDANCE"
240 device i2c 0x42 on end
241 end
242 chip drivers/i2c/cs35l53
243 register "name" = ""SPK3""
eddylu@ami.corp-partner.google.com54516672022-05-19 11:47:37 +0800244 register "sub" = ""103CA221""
245 register "desc" = ""Cirrus Logic CS35L53 Woofer Right Audio Codec""
246 register "uid" = "1"
Shon Wang8d296b12021-12-24 10:45:15 +0800247 register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_D14)"
eddylu@ami.corp-partner.google.com54516672022-05-19 11:47:37 +0800248 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
Shon Wang8d296b12021-12-24 10:45:15 +0800249 register "boost_type" = "EXTERNAL_BOOST"
250 register "asp_sdout_hiz" = "ASP_SDOUT_LOGIC0_UNUSED_LOGIC0_DISABLED"
251 register "gpio1_output_enable" = "true"
252 register "gpio1_src_select" = "GPIO1_SRC_GPIO"
253 register "gpio2_src_select" = "GPIO2_SRC_HIGH_IMPEDANCE"
254 device i2c 0x43 on end
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800255 end
256 end #I2C0
257 device ref i2c1 on
Shon Wang138f5472021-12-14 20:41:48 +0800258 chip drivers/i2c/tpm
259 register "hid" = ""GOOG0005""
260 register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
261 device i2c 50 on end
262 end
263 end
264 device ref i2c3 on
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800265 chip drivers/i2c/hid
Shon Wang3b9077a2022-02-24 11:04:17 +0800266 register "generic.hid" = ""ELAN2513""
267 register "generic.desc" = ""ELAN Touchscreen""
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800268 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
269 register "generic.probed" = "1"
270 register "generic.reset_gpio" =
271 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
Shon Wang3b9077a2022-02-24 11:04:17 +0800272 register "generic.reset_delay_ms" = "200"
273 register "generic.reset_off_delay_ms" = "1"
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800274 register "generic.enable_gpio" =
275 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
Shon Wang3b9077a2022-02-24 11:04:17 +0800276 register "generic.enable_delay_ms" = "6"
277 register "generic.stop_gpio" =
278 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
279 register "generic.stop_off_delay_ms" = "1"
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800280 register "generic.has_power_resource" = "1"
Tim Wawrzynczaka7e85d42021-12-16 11:17:07 -0700281 register "generic.disable_gpio_export_in_crs" = "1"
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800282 register "hid_desc_reg_offset" = "0x01"
Shon Wang3b9077a2022-02-24 11:04:17 +0800283 device i2c 0x10 on end
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800284 end
285 end
Shon Wangf00680a2021-12-21 17:41:19 +0800286 device ref i2c2 on
287 chip drivers/intel/mipi_camera
288 register "acpi_hid" = ""OVTI8856""
289 register "acpi_uid" = "0"
290 register "acpi_name" = ""CAM0""
291 register "chip_name" = ""Ov 8856 Camera""
292 register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"
293 register "has_power_resource" = "1"
294
295 register "ssdb.lanes_used" = "4"
Shon Wang7e22ac12022-04-07 16:23:14 +0800296 register "ssdb.link_used" = "1"
Shon Wangf00680a2021-12-21 17:41:19 +0800297 register "num_freq_entries" = "2"
298 register "link_freq[0]" = "360000000"
299 register "link_freq[1]" = "180000000"
300 register "remote_name" = ""IPU0""
Shon Wang7e22ac12022-04-07 16:23:14 +0800301 register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D3_COLD"
Shon Wangf00680a2021-12-21 17:41:19 +0800302
303 #Controls
304 register "clk_panel.clks[0].clknum" = "IMGCLKOUT_2"
305 register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ"
306
307 register "gpio_panel.gpio[0].gpio_num" = "GPP_F20" #reset
308 register "gpio_panel.gpio[1].gpio_num" = "GPP_C4" #power
309
310 #_ON
Shon Wang7e22ac12022-04-07 16:23:14 +0800311 register "on_seq.ops_cnt" = "4"
Shon Wangf00680a2021-12-21 17:41:19 +0800312 register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
Shon Wang7e22ac12022-04-07 16:23:14 +0800313 register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
314 register "on_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 5)"
315 register "on_seq.ops[3]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
Shon Wangf00680a2021-12-21 17:41:19 +0800316
317 #_OFF
318 register "off_seq.ops_cnt" = "3"
Shon Wang7e22ac12022-04-07 16:23:14 +0800319 register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
320 register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
321 register "off_seq.ops[2]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
Shon Wangf00680a2021-12-21 17:41:19 +0800322
323 device i2c 36 on end
324 end
325 chip drivers/intel/mipi_camera
Shon Wang7e22ac12022-04-07 16:23:14 +0800326 register "acpi_hid" = "ACPI_DT_NAMESPACE_HID"
Shon Wangf00680a2021-12-21 17:41:19 +0800327 register "acpi_uid" = "1"
328 register "acpi_name" = ""NVM0""
329 register "chip_name" = ""GT24C08""
330 register "device_type" = "INTEL_ACPI_CAMERA_NVM"
331
Shon Wangf00680a2021-12-21 17:41:19 +0800332 register "nvm_compat" = ""atmel,24c1024""
333
334 register "nvm_size" = "0x2000"
335 register "nvm_pagesize" = "0x01"
336 register "nvm_readonly" = "0x01"
337 register "nvm_width" = "0x10"
338
339 device i2c 50 on end
340 end
341 end
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800342 device ref i2c5 on
=0617d5a2021-12-14 15:20:43 +0800343 chip drivers/i2c/hid
344 register "generic.hid" = ""ELAN2703""
345 register "generic.desc" = ""ELAN Touchpad""
346 register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
347 register "generic.wake" = "GPE0_DW2_14"
348 register "generic.probed" = "1"
349 register "hid_desc_reg_offset" = "0x01"
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800350 device i2c 15 on end
351 end
352 end
eddylu@ami.corp-partner.google.com54516672022-05-19 11:47:37 +0800353 device ref i2c7 on
354 chip drivers/i2c/cs35l53
355 register "name" = ""SPK0""
356 register "sub" = ""103CA221""
357 register "desc" = ""Cirrus Logic CS35L53 Tweeter Left Audio Codec""
358 register "uid" = "2"
359 register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_D14)"
360 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
361 register "boost_type" = "EXTERNAL_BOOST"
362 register "asp_sdout_hiz" = "ASP_SDOUT_LOGIC0_UNUSED_LOGIC0_DISABLED"
363 register "gpio1_output_enable" = "true"
364 register "gpio1_src_select" = "GPIO1_SRC_GPIO"
365 register "gpio2_src_select" = "GPIO2_SRC_HIGH_IMPEDANCE"
366 device i2c 0x40 on end
367 end
368 chip drivers/i2c/cs35l53
369 register "name" = ""SPK1""
370 register "sub" = ""103CA221""
371 register "desc" = ""Cirrus Logic CS35L53 Woofer Left Audio Codec""
372 register "uid" = "0"
373 register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_D14)"
374 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
375 register "boost_type" = "EXTERNAL_BOOST"
376 register "asp_sdout_hiz" = "ASP_SDOUT_LOGIC0_UNUSED_LOGIC0_DISABLED"
377 register "gpio1_output_enable" = "true"
378 register "gpio1_src_select" = "GPIO1_SRC_GPIO"
379 register "gpio2_src_select" = "GPIO2_SRC_HIGH_IMPEDANCE"
380 device i2c 0x41 on end
381 end
382 end
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800383 device ref gspi1 on
384 chip drivers/spi/acpi
385 register "name" = ""CRFP""
386 register "hid" = "ACPI_DT_NAMESPACE_HID"
387 register "uid" = "1"
388 register "compat_string" = ""google,cros-ec-spi""
389 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F15_IRQ)"
390 register "wake" = "GPE0_DW2_15"
391 device spi 0 on end
392 end # FPMCU
393 end
394 device ref pch_espi on
395 chip ec/google/chromeec
396 use conn0 as mux_conn[0]
397 use conn1 as mux_conn[1]
Shon Wangb5106702021-12-20 16:04:46 +0800398 use conn2 as mux_conn[2]
399 use conn3 as mux_conn[3]
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800400 device pnp 0c09.0 on end
401 end
402 end
403 device ref pmc hidden
404 chip drivers/intel/pmc_mux
405 device generic 0 on
406 chip drivers/intel/pmc_mux/conn
Felix Held30f4c532021-12-24 02:09:45 +0100407 use usb2_port1 as usb2_port
408 use tcss_usb3_port1 as usb3_port
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800409 device generic 0 alias conn0 on end
410 end
411 chip drivers/intel/pmc_mux/conn
Shon Wangb5106702021-12-20 16:04:46 +0800412 use usb2_port2 as usb2_port
413 use tcss_usb3_port2 as usb3_port
414 device generic 1 alias conn1 on end
415 end
416 chip drivers/intel/pmc_mux/conn
Felix Held30f4c532021-12-24 02:09:45 +0100417 use usb2_port3 as usb2_port
418 use tcss_usb3_port3 as usb3_port
Shon Wangb5106702021-12-20 16:04:46 +0800419 device generic 2 alias conn2 on end
420 end
421 chip drivers/intel/pmc_mux/conn
422 use usb2_port5 as usb2_port
423 use tcss_usb3_port4 as usb3_port
424 device generic 3 alias conn3 on end
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800425 end
426 end
427 end
428 end
429 device ref tcss_xhci on
430 chip drivers/usb/acpi
431 device ref tcss_root_hub on
432 chip drivers/usb/acpi
433 register "desc" = ""USB3 Type-C Port C0 (MLB)""
434 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
Subrata Banik5b0ce062022-02-16 20:30:37 +0530435 register "use_custom_pld" = "true"
Robert Chene39d3712022-02-21 19:32:39 +0800436 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(1, 1))"
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800437 device ref tcss_usb3_port1 on end
438 end
439 chip drivers/usb/acpi
Shon Wangb5106702021-12-20 16:04:46 +0800440 register "desc" = ""USB3 Type-C Port C1 (MlB)""
441 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
Subrata Banik5b0ce062022-02-16 20:30:37 +0530442 register "use_custom_pld" = "true"
Robert Chene39d3712022-02-21 19:32:39 +0800443 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
Shon Wangb5106702021-12-20 16:04:46 +0800444 device ref tcss_usb3_port2 on end
445 end
446 chip drivers/usb/acpi
447 register "desc" = ""USB3 Type-C Port C2 (DB)""
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800448 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
Subrata Banik5b0ce062022-02-16 20:30:37 +0530449 register "use_custom_pld" = "true"
Robert Chene39d3712022-02-21 19:32:39 +0800450 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))"
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800451 device ref tcss_usb3_port3 on end
452 end
Shon Wangb5106702021-12-20 16:04:46 +0800453 chip drivers/usb/acpi
454 register "desc" = ""USB3 Type-C Port C3 (DB)""
455 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
Subrata Banik5b0ce062022-02-16 20:30:37 +0530456 register "use_custom_pld" = "true"
Robert Chene39d3712022-02-21 19:32:39 +0800457 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(4, 1))"
Shon Wangb5106702021-12-20 16:04:46 +0800458 device ref tcss_usb3_port4 on end
459 end
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800460 end
461 end
462 end
463 device ref xhci on
464 chip drivers/usb/acpi
465 device ref xhci_root_hub on
466 chip drivers/usb/acpi
467 register "desc" = ""USB2 Type-C Port C0 (MLB)""
468 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
Subrata Banik5b0ce062022-02-16 20:30:37 +0530469 register "use_custom_pld" = "true"
Robert Chene39d3712022-02-21 19:32:39 +0800470 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(1, 1))"
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800471 device ref usb2_port1 on end
472 end
473 chip drivers/usb/acpi
Shon Wangb5106702021-12-20 16:04:46 +0800474 register "desc" = ""USB2 Type-C Port C1 (MLB)""
475 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
Subrata Banik5b0ce062022-02-16 20:30:37 +0530476 register "use_custom_pld" = "true"
Robert Chene39d3712022-02-21 19:32:39 +0800477 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800478 device ref usb2_port2 on end
Shon Wangb5106702021-12-20 16:04:46 +0800479 end
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800480 chip drivers/usb/acpi
481 register "desc" = ""USB2 Type-C Port C2 (DB)""
482 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
Subrata Banik5b0ce062022-02-16 20:30:37 +0530483 register "use_custom_pld" = "true"
Robert Chene39d3712022-02-21 19:32:39 +0800484 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))"
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800485 device ref usb2_port3 on end
486 end
487 chip drivers/usb/acpi
488 register "desc" = ""USB2 WWAN""
489 register "type" = "UPC_TYPE_INTERNAL"
490 device ref usb2_port4 on end
491 end
492 chip drivers/usb/acpi
Shon Wangb5106702021-12-20 16:04:46 +0800493 register "desc" = ""USB2 Type-C Port C3 (DB)""
494 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
Subrata Banik5b0ce062022-02-16 20:30:37 +0530495 register "use_custom_pld" = "true"
Robert Chene39d3712022-02-21 19:32:39 +0800496 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(4, 1))"
Shon Wangb5106702021-12-20 16:04:46 +0800497 device ref usb2_port5 on end
498 end
499 chip drivers/usb/acpi
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800500 register "desc" = ""USB2 Camera""
501 register "type" = "UPC_TYPE_INTERNAL"
502 device ref usb2_port6 on end
503 end
504 chip drivers/usb/acpi
Daisuke Nojiric3dab9c2022-01-10 10:41:17 -0800505 register "desc" = ""RGB Keyboard""
506 register "type" = "UPC_TYPE_INTERNAL"
507 device ref usb2_port7 on end
508 end
509 chip drivers/usb/acpi
Kevin Chiu2649f5a2021-11-15 20:45:19 +0800510 register "desc" = ""USB3 WWAN""
511 register "type" = "UPC_TYPE_INTERNAL"
512 device ref usb3_port4 on end
513 end
514 end
515 end
516 end
517 end
Shon Wangb8f05392021-11-12 14:10:31 +0800518end