Angel Pons | b925b7a | 2021-05-17 18:15:20 +0200 | [diff] [blame] | 1 | ## SPDX-License-Identifier: GPL-2.0-only |
| 2 | |
| 3 | chip northbridge/intel/sandybridge |
Keith Hui | 7039edd | 2023-07-21 10:12:05 -0400 | [diff] [blame] | 4 | register "usb_port_config" = "{ |
| 5 | {1, 0, 0x0080}, {1, 0, 0x0080}, {1, 1, 0x0080}, {1, 1, 0x0080}, {1, 2, 0x0080}, |
| 6 | {1, 2, 0x0080}, {1, 3, 0x0080}, {1, 3, 0x0080}, {1, 4, 0x0080}, {1, 4, 0x0080}, |
| 7 | {1, 6, 0x0080}, {1, 5, 0x0080}, {0, 5, 0x0080}, {0, 6, 0x0080} |
| 8 | }" |
Angel Pons | b925b7a | 2021-05-17 18:15:20 +0200 | [diff] [blame] | 9 | device domain 0 on |
| 10 | subsystemid 0x1043 0x84ca inherit |
| 11 | chip southbridge/intel/bd82x6x |
| 12 | register "gen1_dec" = "0x000c0291" |
| 13 | register "gen4_dec" = "0x0000ff29" |
Angel Pons | af4bd56 | 2021-12-28 13:05:56 +0100 | [diff] [blame] | 14 | register "pcie_port_coalesce" = "true" |
Keith Hui | 51a57eb | 2024-02-05 16:44:38 -0500 | [diff] [blame^] | 15 | register "usb_port_config" = "{ |
| 16 | {1, 2, 0}, |
| 17 | {1, 2, 0}, |
| 18 | {1, 2, 1}, |
| 19 | {1, 2, 1}, |
| 20 | {1, 2, 2}, |
| 21 | {1, 2, 2}, |
| 22 | {1, 2, 3}, |
| 23 | {1, 2, 3}, |
| 24 | {1, 2, 4}, |
| 25 | {1, 2, 4}, |
| 26 | {1, 2, 6}, |
| 27 | {1, 2, 5}, |
| 28 | {0, 2, 5}, |
| 29 | {0, 2, 6} |
| 30 | }" |
Angel Pons | b925b7a | 2021-05-17 18:15:20 +0200 | [diff] [blame] | 31 | |
Felix Singer | 76f3dbd | 2024-01-13 23:17:30 +0100 | [diff] [blame] | 32 | device ref pcie_rp1 on end # PCIEX_16_3 |
| 33 | device ref pcie_rp2 on end # RTL8111F |
| 34 | device ref pcie_rp3 off end |
| 35 | device ref pcie_rp4 off end |
| 36 | device ref pcie_rp5 off end |
| 37 | device ref pcie_rp6 on end # ASM1042 USB3 |
| 38 | device ref pcie_rp7 on end # ASM1061 eSATA |
| 39 | device ref pcie_rp8 off end |
Angel Pons | b925b7a | 2021-05-17 18:15:20 +0200 | [diff] [blame] | 40 | |
Felix Singer | 76f3dbd | 2024-01-13 23:17:30 +0100 | [diff] [blame] | 41 | device ref lpc on |
Angel Pons | b925b7a | 2021-05-17 18:15:20 +0200 | [diff] [blame] | 42 | chip superio/nuvoton/nct6779d |
| 43 | device pnp 2e.1 off end # Parallel |
| 44 | device pnp 2e.2 off end # UART A |
| 45 | device pnp 2e.3 on # UART B, IR |
| 46 | io 0x60 = 0x2f8 # COM2 address |
| 47 | end |
| 48 | device pnp 2e.5 on # PS2 KBC |
| 49 | io 0x60 = 0x0060 # KBC1 base |
| 50 | io 0x62 = 0x0064 # KBC2 base |
| 51 | irq 0x70 = 1 # Keyboard IRQ |
| 52 | irq 0x72 = 12 # Mouse IRQ |
| 53 | |
| 54 | # KBC 12Mhz/A20 speed/sw KBRST |
| 55 | drq 0xf0 = 0x82 |
| 56 | end |
| 57 | device pnp 2e.6 off end # CIR |
| 58 | device pnp 2e.7 on end # GPIOs 6-8 |
| 59 | device pnp 2e.8 off end # WDT1 GPIO 0-1 |
| 60 | device pnp 2e.9 off end # GPIO 1-8 |
| 61 | device pnp 2e.a on # ACPI |
| 62 | drq 0xe4 = 0x10 # Enable 3VSBS to power RAM on S3 |
| 63 | drq 0xe7 = 0x10 # 0.5s S3 delay for compatibility |
| 64 | end |
| 65 | device pnp 2e.b off end # HWM, LED |
| 66 | device pnp 2e.d off end # WDT1 |
| 67 | device pnp 2e.e off end # CIR wake-up |
| 68 | device pnp 2e.f on # GPIO PP/OD |
| 69 | drq 0xe6 = 0x7f # GP7 PP |
| 70 | end |
| 71 | device pnp 2e.14 on end # Port 80 UART |
| 72 | device pnp 2e.16 off end # Deep sleep |
| 73 | end |
| 74 | chip drivers/pc80/tpm |
| 75 | device pnp 4e.0 on end # TPM |
| 76 | end |
| 77 | end |
| 78 | end |
| 79 | end |
| 80 | end |