Blame - src/arch/x86/Kconfig - coreboot

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Stefan Reinauer	1b34226	2011-01-05 02:27:53 +0000	[diff] [blame]	1	menu "Architecture (x86)"
				2
Uwe Hermann	168b11b	2009-10-07 16:15:40 +0000	[diff] [blame]	3	# This is an SMP option. It relates to starting up APs.
				4	# It is usually set in mainboard/*/Kconfig.
				5	# TODO: Improve description.
Ronald G. Minnich	6ed39d9	2009-08-29 02:59:35 +0000	[diff] [blame]	6
Kyösti Mälkki	f8c7c23	2012-04-06 04:03:50 +0300	[diff] [blame]	7	# Aligns 16bit entry code in bootblock so that hyper-threading CPUs
				8	# can boot AP CPUs to enable their shared caches.
				9	config SIPI_VECTOR_IN_ROM
				10	bool
				11	default n
				12	depends on ARCH_X86
				13
Patrick Georgi	0588d19	2009-08-12 15:00:51 +0000	[diff] [blame]	14	config RAMBASE
				15	hex
				16	default 0x100000
				17
Stefan Reinauer	523ebd9	2010-04-14 18:59:42 +0000	[diff] [blame]	18	config RAMTOP
				19	hex
				20	default 0x200000
				21
Patrick Georgi	0588d19	2009-08-12 15:00:51 +0000	[diff] [blame]	22	config STACK_SIZE
				23	hex
				24	default 0x8000
				25
Uwe Hermann	168b11b	2009-10-07 16:15:40 +0000	[diff] [blame]	26	# Maximum reboot count
				27	# TODO: Improve description.
Patrick Georgi	0588d19	2009-08-12 15:00:51 +0000	[diff] [blame]	28	config MAX_REBOOT_CNT
Uwe Hermann	168b11b	2009-10-07 16:15:40 +0000	[diff] [blame]	29	int
Patrick Georgi	0588d19	2009-08-12 15:00:51 +0000	[diff] [blame]	30	default 3
				31
Stefan Reinauer	8aedcbc	2010-12-16 23:37:17 +0000	[diff] [blame]	32	# We had to rename the choice options under arch/ because otherwise
				33	# the options would conflict between different architectures despite
				34	# the if ARCH_xxx guarding the arch/xxx/Kconfig sourcing.
Patrick Georgi	c9fa96d	2010-02-24 13:58:23 +0000	[diff] [blame]	35	choice
				36	prompt "Bootblock behaviour"
Stefan Reinauer	8aedcbc	2010-12-16 23:37:17 +0000	[diff] [blame]	37	default X86_BOOTBLOCK_SIMPLE
Patrick Georgi	c9fa96d	2010-02-24 13:58:23 +0000	[diff] [blame]	38
Stefan Reinauer	8aedcbc	2010-12-16 23:37:17 +0000	[diff] [blame]	39	config X86_BOOTBLOCK_SIMPLE
Patrick Georgi	c9fa96d	2010-02-24 13:58:23 +0000	[diff] [blame]	40	bool "Always load fallback"
				41
Stefan Reinauer	8aedcbc	2010-12-16 23:37:17 +0000	[diff] [blame]	42	config X86_BOOTBLOCK_NORMAL
Patrick Georgi	c9fa96d	2010-02-24 13:58:23 +0000	[diff] [blame]	43	bool "Switch to normal if CMOS says so"
				44
				45	endchoice
				46
				47	config BOOTBLOCK_SOURCE
				48	string
Stefan Reinauer	8aedcbc	2010-12-16 23:37:17 +0000	[diff] [blame]	49	default "bootblock_simple.c" if X86_BOOTBLOCK_SIMPLE
				50	default "bootblock_normal.c" if X86_BOOTBLOCK_NORMAL
Patrick Georgi	c9fa96d	2010-02-24 13:58:23 +0000	[diff] [blame]	51
Patrick Georgi	967952a	2010-02-09 19:41:11 +0000	[diff] [blame]	52	config UPDATE_IMAGE
				53	bool "Update existing coreboot.rom image"
				54	default n
Patrick Georgi	967952a	2010-02-09 19:41:11 +0000	[diff] [blame]	55	help
Uwe Hermann	16db6c3	2010-09-23 18:48:27 +0000	[diff] [blame]	56	If this option is enabled, no new coreboot.rom file
				57	is created. Instead it is expected that there already
				58	is a suitable file for further processing.
				59	The bootblock will not be modified.
Patrick Georgi	967952a	2010-02-09 19:41:11 +0000	[diff] [blame]	60
Patrick Georgi	2063197a	2010-02-09 12:21:10 +0000	[diff] [blame]	61	config ROMCC
				62	bool
				63	default n
				64
Stefan Reinauer	8aedcbc	2010-12-16 23:37:17 +0000	[diff] [blame]	65	config PC80_SYSTEM
				66	bool
				67	default y
				68
Patrick Georgi	1bb6828	2009-12-31 12:56:53 +0000	[diff] [blame]	69	config BOOTBLOCK_NORTHBRIDGE_INIT
				70	string
				71
Patrick Georgi	a865b17	2011-01-14 07:40:24 +0000	[diff] [blame]	72	config HAVE_CMOS_DEFAULT
				73	def_bool n
				74
				75	config CMOS_DEFAULT_FILE
				76	string
				77	depends on HAVE_CMOS_DEFAULT
				78
Patrick Georgi	1bb6828	2009-12-31 12:56:53 +0000	[diff] [blame]	79	config BOOTBLOCK_SOUTHBRIDGE_INIT
				80	string
Stefan Reinauer	1b34226	2011-01-05 02:27:53 +0000	[diff] [blame]	81
Stefan Reinauer	1afe51a	2011-10-26 22:11:52 +0000	[diff] [blame]	82	config HAVE_ARCH_MEMSET
				83	bool
				84	default y
				85
Stefan Reinauer	0054afa	2011-10-25 23:43:34 +0000	[diff] [blame]	86	config HAVE_ARCH_MEMCPY
				87	bool
				88	default y
				89
Stefan Reinauer	3e4fb9d	2011-04-21 21:26:58 +0000	[diff] [blame]	90	config BIG_ENDIAN
				91	bool
				92	default n
				93
				94	config LITTLE_ENDIAN
				95	bool
				96	default !BIG_ENDIAN
				97
Patrick Georgi	d4d5e4d	2012-03-16 19:28:15 +0100	[diff] [blame]	98	config IOAPIC_INTERRUPTS_ON_FSB
				99	bool
				100	default y if !IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
				101
				102	config IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
				103	bool
				104	default n
				105
Stefan Reinauer	5e02bc6	2011-11-17 13:05:31 -0800	[diff] [blame]	106	config PCI_CONF2
				107	bool
				108	default n
				109
Stefan Reinauer	1b34226	2011-01-05 02:27:53 +0000	[diff] [blame]	110	endmenu