blob: 205f3dd1e541722c1f57507f12d7ac04b198ee43 [file] [log] [blame]
Kangheui Won18581532022-06-28 15:55:25 +10001FLASH 16M {
Krishna P Bhat D1c6b02a2022-11-16 12:46:06 +05302 SI_ALL 3712K {
Kangheui Won18581532022-06-28 15:55:25 +10003 SI_DESC 4K
Reka Norman5013f7d2022-11-14 11:55:09 +11004 SI_ME
Kangheui Won18581532022-06-28 15:55:25 +10005 }
Krishna P Bhat D1c6b02a2022-11-16 12:46:06 +05306 SI_BIOS 12672K {
7 RW_SECTION_A 4212K {
Kangheui Won18581532022-06-28 15:55:25 +10008 VBLOCK_A 8K
9 FW_MAIN_A(CBFS)
10 RW_FWID_A 64
Kangheui Won18581532022-06-28 15:55:25 +100011 }
12 RW_MISC 152K {
13 UNIFIED_MRC_CACHE(PRESERVE) 128K {
14 RECOVERY_MRC_CACHE 64K
15 RW_MRC_CACHE 64K
16 }
17 RW_ELOG(PRESERVE) 4K
18 RW_SHARED 4K {
19 SHARED_DATA 4K
20 }
21 RW_VPD(PRESERVE) 8K
22 RW_NVRAM(PRESERVE) 8K
23 }
Krishna P Bhat D1c6b02a2022-11-16 12:46:06 +053024 RW_SECTION_B 4212K {
Kangheui Won18581532022-06-28 15:55:25 +100025 VBLOCK_B 8K
26 FW_MAIN_B(CBFS)
27 RW_FWID_B 64
Kangheui Won18581532022-06-28 15:55:25 +100028 }
29 # Make WP_RO region align with SPI vendor
30 # memory protected range specification.
31 WP_RO 4M {
32 RO_VPD(PRESERVE) 16K
33 RO_GSCVD 8K
34 RO_SECTION {
35 FMAP 2K
36 RO_FRID 64
37 GBB@4K 12K
38 COREBOOT(CBFS)
39 }
40 }
41 }
42}