Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Lee Leahy | b092c9e | 2016-01-01 18:09:50 -0800 | [diff] [blame] | 4 | * Copyright (C) 2014-2016 Intel Corporation |
Frans Hendriks | 8f95edc | 2018-11-06 12:04:34 +0100 | [diff] [blame] | 5 | * Copyright (C) 2018 Eltan B.V. |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 15 | */ |
| 16 | |
Aaron Durbin | 932e09d | 2016-07-13 23:09:52 -0500 | [diff] [blame] | 17 | #include <arch/acpi.h> |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 18 | #include <cbmem.h> |
Patrick Rudolph | f677d17 | 2018-10-01 19:17:11 +0200 | [diff] [blame] | 19 | #include <cf9_reset.h> |
Elyes HAOUAS | 2195f7a | 2019-06-21 07:20:12 +0200 | [diff] [blame] | 20 | #include <commonlib/helpers.h> |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 21 | #include <console/console.h> |
Lee Leahy | 94b856e | 2015-10-15 12:07:03 -0700 | [diff] [blame] | 22 | #include <fsp/memmap.h> |
Lee Leahy | b092c9e | 2016-01-01 18:09:50 -0800 | [diff] [blame] | 23 | #include <fsp/romstage.h> |
Aaron Durbin | 789f2b6 | 2015-09-09 17:05:06 -0500 | [diff] [blame] | 24 | #include <fsp/util.h> |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 25 | #include <lib.h> /* hexdump */ |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 26 | #include <string.h> |
| 27 | #include <timestamp.h> |
Philipp Deppenwiese | fea2429 | 2017-10-17 17:02:29 +0200 | [diff] [blame] | 28 | #include <security/vboot/vboot_common.h> |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 29 | |
| 30 | void raminit(struct romstage_params *params) |
| 31 | { |
Nico Huber | 16895c5 | 2019-05-04 16:29:17 +0200 | [diff] [blame] | 32 | const bool s3wake = params->power_state->prev_sleep_state == ACPI_S3; |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 33 | const EFI_GUID bootldr_tolum_guid = FSP_BOOTLOADER_TOLUM_HOB_GUID; |
| 34 | EFI_HOB_RESOURCE_DESCRIPTOR *cbmem_root; |
| 35 | FSP_INFO_HEADER *fsp_header; |
| 36 | EFI_HOB_RESOURCE_DESCRIPTOR *fsp_memory; |
| 37 | FSP_MEMORY_INIT fsp_memory_init; |
| 38 | FSP_MEMORY_INIT_PARAMS fsp_memory_init_params; |
| 39 | const EFI_GUID fsp_reserved_guid = |
| 40 | FSP_RESERVED_MEMORY_RESOURCE_HOB_GUID; |
| 41 | void *fsp_reserved_memory_area; |
| 42 | FSP_INIT_RT_COMMON_BUFFER fsp_rt_common_buffer; |
| 43 | void *hob_list_ptr; |
| 44 | FSP_SMBIOS_MEMORY_INFO *memory_info_hob; |
| 45 | const EFI_GUID memory_info_hob_guid = FSP_SMBIOS_MEMORY_INFO_GUID; |
| 46 | MEMORY_INIT_UPD memory_init_params; |
| 47 | const EFI_GUID mrc_guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID; |
| 48 | u32 *mrc_hob; |
| 49 | u32 fsp_reserved_bytes; |
| 50 | MEMORY_INIT_UPD *original_params; |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 51 | EFI_STATUS status; |
| 52 | VPD_DATA_REGION *vpd_ptr; |
| 53 | UPD_DATA_REGION *upd_ptr; |
| 54 | int fsp_verification_failure = 0; |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 55 | #if CONFIG(DISPLAY_HOBS) |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 56 | unsigned long int data; |
| 57 | EFI_PEI_HOB_POINTERS hob_ptr; |
| 58 | #endif |
| 59 | |
| 60 | /* |
| 61 | * Find and copy the UPD region to the stack so the platform can modify |
| 62 | * the settings if needed. Modifications to the UPD buffer are done in |
| 63 | * the platform callback code. The platform callback code is also |
| 64 | * responsible for assigning the UpdDataRngPtr to this buffer if any |
| 65 | * updates are made. The default state is to leave the UpdDataRngPtr |
| 66 | * set to NULL. This indicates that the FSP code will use the UPD |
| 67 | * region in the FSP binary. |
| 68 | */ |
Furquan Shaikh | 585210a | 2018-10-16 11:54:37 -0700 | [diff] [blame] | 69 | post_code(POST_MEM_PREINIT_PREP_START); |
Aaron Durbin | e6af4be | 2015-09-24 12:26:31 -0500 | [diff] [blame] | 70 | fsp_header = params->chipset_context; |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 71 | vpd_ptr = (VPD_DATA_REGION *)(fsp_header->CfgRegionOffset + |
| 72 | fsp_header->ImageBase); |
| 73 | printk(BIOS_DEBUG, "VPD Data: 0x%p\n", vpd_ptr); |
| 74 | upd_ptr = (UPD_DATA_REGION *)(vpd_ptr->PcdUpdRegionOffset + |
| 75 | fsp_header->ImageBase); |
| 76 | printk(BIOS_DEBUG, "UPD Data: 0x%p\n", upd_ptr); |
| 77 | original_params = (void *)((u8 *)upd_ptr + |
| 78 | upd_ptr->MemoryInitUpdOffset); |
| 79 | memcpy(&memory_init_params, original_params, |
| 80 | sizeof(memory_init_params)); |
| 81 | |
| 82 | /* Zero fill RT Buffer data and start populating fields. */ |
| 83 | memset(&fsp_rt_common_buffer, 0, sizeof(fsp_rt_common_buffer)); |
Nico Huber | 16895c5 | 2019-05-04 16:29:17 +0200 | [diff] [blame] | 84 | if (s3wake) { |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 85 | fsp_rt_common_buffer.BootMode = BOOT_ON_S3_RESUME; |
Nico Huber | 66318aa | 2019-05-04 16:59:20 +0200 | [diff] [blame] | 86 | } else if (params->saved_data != NULL) { |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 87 | fsp_rt_common_buffer.BootMode = |
| 88 | BOOT_ASSUMING_NO_CONFIGURATION_CHANGES; |
| 89 | } else { |
| 90 | fsp_rt_common_buffer.BootMode = BOOT_WITH_FULL_CONFIGURATION; |
| 91 | } |
| 92 | fsp_rt_common_buffer.UpdDataRgnPtr = &memory_init_params; |
| 93 | fsp_rt_common_buffer.BootLoaderTolumSize = cbmem_overhead_size(); |
| 94 | |
| 95 | /* Get any board specific changes */ |
Nico Huber | 66318aa | 2019-05-04 16:59:20 +0200 | [diff] [blame] | 96 | fsp_memory_init_params.NvsBufferPtr = (void *)params->saved_data; |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 97 | fsp_memory_init_params.RtBufferPtr = &fsp_rt_common_buffer; |
| 98 | fsp_memory_init_params.HobListPtr = &hob_list_ptr; |
| 99 | |
| 100 | /* Update the UPD data */ |
Duncan Laurie | 9dcd4f0 | 2015-08-17 18:09:14 -0700 | [diff] [blame] | 101 | soc_memory_init_params(params, &memory_init_params); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 102 | mainboard_memory_init_params(params, &memory_init_params); |
Pratik Prajapati | b90b94d | 2015-09-11 13:51:38 -0700 | [diff] [blame] | 103 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 104 | if (CONFIG(MMA)) |
Pratik Prajapati | b90b94d | 2015-09-11 13:51:38 -0700 | [diff] [blame] | 105 | setup_mma(&memory_init_params); |
| 106 | |
Furquan Shaikh | 585210a | 2018-10-16 11:54:37 -0700 | [diff] [blame] | 107 | post_code(POST_MEM_PREINIT_PREP_END); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 108 | |
| 109 | /* Display the UPD data */ |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 110 | if (CONFIG(DISPLAY_UPD_DATA)) |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 111 | soc_display_memory_init_params(original_params, |
| 112 | &memory_init_params); |
| 113 | |
| 114 | /* Call FspMemoryInit to initialize RAM */ |
| 115 | fsp_memory_init = (FSP_MEMORY_INIT)(fsp_header->ImageBase |
| 116 | + fsp_header->FspMemoryInitEntryOffset); |
| 117 | printk(BIOS_DEBUG, "Calling FspMemoryInit: 0x%p\n", fsp_memory_init); |
| 118 | printk(BIOS_SPEW, " 0x%p: NvsBufferPtr\n", |
| 119 | fsp_memory_init_params.NvsBufferPtr); |
| 120 | printk(BIOS_SPEW, " 0x%p: RtBufferPtr\n", |
| 121 | fsp_memory_init_params.RtBufferPtr); |
| 122 | printk(BIOS_SPEW, " 0x%p: HobListPtr\n", |
| 123 | fsp_memory_init_params.HobListPtr); |
| 124 | |
| 125 | timestamp_add_now(TS_FSP_MEMORY_INIT_START); |
Duncan Laurie | fb50983 | 2015-11-22 14:53:57 -0800 | [diff] [blame] | 126 | post_code(POST_FSP_MEMORY_INIT); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 127 | status = fsp_memory_init(&fsp_memory_init_params); |
Frans Hendriks | 1385b7d | 2019-04-05 13:42:14 +0200 | [diff] [blame] | 128 | mainboard_after_memory_init(); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 129 | post_code(0x37); |
| 130 | timestamp_add_now(TS_FSP_MEMORY_INIT_END); |
| 131 | |
| 132 | printk(BIOS_DEBUG, "FspMemoryInit returned 0x%08x\n", status); |
| 133 | if (status != EFI_SUCCESS) |
Keith Short | 2430263 | 2019-05-16 14:08:31 -0600 | [diff] [blame] | 134 | die_with_post_code(POST_RAM_FAILURE, |
| 135 | "ERROR - FspMemoryInit failed to initialize memory!\n"); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 136 | |
| 137 | /* Locate the FSP reserved memory area */ |
| 138 | fsp_reserved_bytes = 0; |
| 139 | fsp_memory = get_next_resource_hob(&fsp_reserved_guid, hob_list_ptr); |
| 140 | if (fsp_memory == NULL) { |
| 141 | fsp_verification_failure = 1; |
| 142 | printk(BIOS_DEBUG, |
| 143 | "7.2: FSP_RESERVED_MEMORY_RESOURCE_HOB missing!\n"); |
| 144 | } else { |
| 145 | fsp_reserved_bytes = fsp_memory->ResourceLength; |
| 146 | printk(BIOS_DEBUG, "Reserving 0x%016lx bytes for FSP\n", |
| 147 | (unsigned long int)fsp_reserved_bytes); |
| 148 | } |
| 149 | |
| 150 | /* Display SMM area */ |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 151 | #if CONFIG(HAVE_SMI_HANDLER) |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 152 | char *smm_base; |
| 153 | size_t smm_size; |
| 154 | |
| 155 | smm_region((void **)&smm_base, &smm_size); |
| 156 | printk(BIOS_DEBUG, "0x%08x: smm_size\n", (unsigned int)smm_size); |
| 157 | printk(BIOS_DEBUG, "0x%p: smm_base\n", smm_base); |
| 158 | #endif |
| 159 | |
| 160 | /* Migrate CAR data */ |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 161 | printk(BIOS_DEBUG, "0x%p: cbmem_top\n", cbmem_top()); |
Nico Huber | 16895c5 | 2019-05-04 16:29:17 +0200 | [diff] [blame] | 162 | if (!s3wake) { |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 163 | cbmem_initialize_empty_id_size(CBMEM_ID_FSP_RESERVED_MEMORY, |
| 164 | fsp_reserved_bytes); |
| 165 | } else if (cbmem_initialize_id_size(CBMEM_ID_FSP_RESERVED_MEMORY, |
| 166 | fsp_reserved_bytes)) { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 167 | #if CONFIG(HAVE_ACPI_RESUME) |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 168 | printk(BIOS_DEBUG, "Failed to recover CBMEM in S3 resume.\n"); |
| 169 | /* Failed S3 resume, reset to come up cleanly */ |
Patrick Rudolph | f677d17 | 2018-10-01 19:17:11 +0200 | [diff] [blame] | 170 | /* FIXME: A "system" reset is likely enough: */ |
| 171 | full_reset(); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 172 | #endif |
| 173 | } |
| 174 | |
| 175 | /* Save the FSP runtime parameters. */ |
Aaron Durbin | e1ecfc9 | 2015-09-16 15:18:04 -0500 | [diff] [blame] | 176 | fsp_set_runtime(fsp_header, hob_list_ptr); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 177 | |
| 178 | /* Lookup the FSP_BOOTLOADER_TOLUM_HOB */ |
| 179 | cbmem_root = get_next_resource_hob(&bootldr_tolum_guid, hob_list_ptr); |
| 180 | if (cbmem_root == NULL) { |
| 181 | fsp_verification_failure = 1; |
| 182 | printk(BIOS_ERR, "7.4: FSP_BOOTLOADER_TOLUM_HOB missing!\n"); |
| 183 | printk(BIOS_ERR, "BootLoaderTolumSize: 0x%08x bytes\n", |
| 184 | fsp_rt_common_buffer.BootLoaderTolumSize); |
| 185 | } |
| 186 | |
| 187 | /* Locate the FSP_SMBIOS_MEMORY_INFO HOB */ |
| 188 | memory_info_hob = get_next_guid_hob(&memory_info_hob_guid, |
| 189 | hob_list_ptr); |
Lee Leahy | 216712a | 2017-03-17 11:23:32 -0700 | [diff] [blame] | 190 | if (memory_info_hob == NULL) { |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 191 | printk(BIOS_ERR, "FSP_SMBIOS_MEMORY_INFO HOB missing!\n"); |
| 192 | fsp_verification_failure = 1; |
| 193 | } else { |
| 194 | printk(BIOS_DEBUG, |
| 195 | "FSP_SMBIOS_MEMORY_INFO HOB: 0x%p\n", |
| 196 | memory_info_hob); |
| 197 | } |
| 198 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 199 | #if CONFIG(DISPLAY_HOBS) |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 200 | /* |
| 201 | * Verify that FSP is generating the required HOBs: |
| 202 | * 7.1: FSP_BOOTLOADER_TEMP_MEMORY_HOB only produced for FSP 1.0 |
| 203 | * 7.2: FSP_RESERVED_MEMORY_RESOURCE_HOB verified above |
Frans Hendriks | 8f95edc | 2018-11-06 12:04:34 +0100 | [diff] [blame] | 204 | * 7.3: FSP_NON_VOLATILE_STORAGE_HOB only produced when |
| 205 | * new NVS data is generated, verified below |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 206 | * 7.4: FSP_BOOTLOADER_TOLUM_HOB verified above |
| 207 | * 7.5: EFI_PEI_GRAPHICS_INFO_HOB produced by SiliconInit |
| 208 | * FSP_SMBIOS_MEMORY_INFO HOB verified above |
| 209 | */ |
Lee Leahy | 216712a | 2017-03-17 11:23:32 -0700 | [diff] [blame] | 210 | if (cbmem_root != NULL) { |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 211 | printk(BIOS_DEBUG, |
| 212 | "7.4: FSP_BOOTLOADER_TOLUM_HOB: 0x%p\n", |
| 213 | cbmem_root); |
| 214 | data = cbmem_root->PhysicalStart; |
| 215 | printk(BIOS_DEBUG, " 0x%016lx: PhysicalStart\n", data); |
| 216 | data = cbmem_root->ResourceLength; |
| 217 | printk(BIOS_DEBUG, " 0x%016lx: ResourceLength\n", data); |
| 218 | } |
| 219 | hob_ptr.Raw = get_next_guid_hob(&mrc_guid, hob_list_ptr); |
Lee Leahy | 216712a | 2017-03-17 11:23:32 -0700 | [diff] [blame] | 220 | if (hob_ptr.Raw == NULL) { |
Nico Huber | 66318aa | 2019-05-04 16:59:20 +0200 | [diff] [blame] | 221 | if (params->saved_data == NULL) { |
Frans Hendriks | 8f95edc | 2018-11-06 12:04:34 +0100 | [diff] [blame] | 222 | printk(BIOS_ERR, "7.3: FSP_NON_VOLATILE_STORAGE_HOB missing!\n"); |
| 223 | fsp_verification_failure = 1; |
| 224 | } |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 225 | } else { |
| 226 | printk(BIOS_DEBUG, |
| 227 | "7.3: FSP_NON_VOLATILE_STORAGE_HOB: 0x%p\n", |
| 228 | hob_ptr.Raw); |
| 229 | } |
| 230 | if (fsp_memory != NULL) { |
| 231 | printk(BIOS_DEBUG, |
| 232 | "7.2: FSP_RESERVED_MEMORY_RESOURCE_HOB: 0x%p\n", |
| 233 | fsp_memory); |
| 234 | data = fsp_memory->PhysicalStart; |
| 235 | printk(BIOS_DEBUG, " 0x%016lx: PhysicalStart\n", data); |
| 236 | data = fsp_memory->ResourceLength; |
| 237 | printk(BIOS_DEBUG, " 0x%016lx: ResourceLength\n", data); |
| 238 | } |
| 239 | |
| 240 | /* Verify all the HOBs are present */ |
| 241 | if (fsp_verification_failure) |
| 242 | printk(BIOS_DEBUG, |
| 243 | "ERROR - Missing one or more required FSP HOBs!\n"); |
| 244 | |
| 245 | /* Display the HOBs */ |
Keith Short | bb41aba | 2019-05-16 14:07:43 -0600 | [diff] [blame] | 246 | if (hob_list_ptr != NULL) |
| 247 | print_hob_type_structure(0, hob_list_ptr); |
| 248 | else |
| 249 | printk(BIOS_ERR, "ERROR - HOB pointer is NULL!\n"); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 250 | #endif |
| 251 | |
| 252 | /* Get the address of the CBMEM region for the FSP reserved memory */ |
| 253 | fsp_reserved_memory_area = cbmem_find(CBMEM_ID_FSP_RESERVED_MEMORY); |
| 254 | printk(BIOS_DEBUG, "0x%p: fsp_reserved_memory_area\n", |
| 255 | fsp_reserved_memory_area); |
| 256 | |
| 257 | /* Verify the order of CBMEM root and FSP memory */ |
| 258 | if ((fsp_memory != NULL) && (cbmem_root != NULL) && |
| 259 | (cbmem_root->PhysicalStart <= fsp_memory->PhysicalStart)) { |
| 260 | fsp_verification_failure = 1; |
| 261 | printk(BIOS_DEBUG, |
| 262 | "ERROR - FSP reserved memory above CBMEM root!\n"); |
| 263 | } |
| 264 | |
| 265 | /* Verify that the FSP memory was properly reserved */ |
| 266 | if ((fsp_memory != NULL) && ((fsp_reserved_memory_area == NULL) || |
| 267 | (fsp_memory->PhysicalStart != |
| 268 | (unsigned int)fsp_reserved_memory_area))) { |
| 269 | fsp_verification_failure = 1; |
| 270 | printk(BIOS_DEBUG, "ERROR - Reserving FSP memory area!\n"); |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 271 | #if CONFIG(HAVE_SMI_HANDLER) |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 272 | if (cbmem_root != NULL) { |
| 273 | size_t delta_bytes = (unsigned int)smm_base |
| 274 | - cbmem_root->PhysicalStart |
| 275 | - cbmem_root->ResourceLength; |
| 276 | printk(BIOS_DEBUG, |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 277 | "0x%08x: Chipset reserved bytes reported by FSP\n", |
| 278 | (unsigned int)delta_bytes); |
Keith Short | bb41aba | 2019-05-16 14:07:43 -0600 | [diff] [blame] | 279 | die_with_post_code(POST_INVALID_VENDOR_BINARY, |
| 280 | "Please verify the chipset reserved size\n"); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 281 | } |
| 282 | #endif |
| 283 | } |
| 284 | |
| 285 | /* Verify the FSP 1.1 HOB interface */ |
| 286 | if (fsp_verification_failure) |
Keith Short | bb41aba | 2019-05-16 14:07:43 -0600 | [diff] [blame] | 287 | die_with_post_code(POST_INVALID_VENDOR_BINARY, |
| 288 | "ERROR - coreboot's requirements not met by FSP binary!\n"); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 289 | |
| 290 | /* Display the memory configuration */ |
| 291 | report_memory_config(); |
| 292 | |
| 293 | /* Locate the memory configuration data to speed up the next reboot */ |
| 294 | mrc_hob = get_next_guid_hob(&mrc_guid, hob_list_ptr); |
| 295 | if (mrc_hob == NULL) |
| 296 | printk(BIOS_DEBUG, |
| 297 | "Memory Configuration Data Hob not present\n"); |
Furquan Shaikh | 0325dc6 | 2016-07-25 13:02:36 -0700 | [diff] [blame] | 298 | else if (!vboot_recovery_mode_enabled()) { |
haridhar | 07e9e6f | 2015-12-18 10:50:46 +0530 | [diff] [blame] | 299 | /* Do not save MRC data in recovery path */ |
Nico Huber | 66318aa | 2019-05-04 16:59:20 +0200 | [diff] [blame] | 300 | params->data_to_save = GET_GUID_HOB_DATA(mrc_hob); |
Felix Held | 51ff9e8 | 2019-06-20 14:49:16 +0200 | [diff] [blame] | 301 | params->data_to_save_size = ALIGN_UP( |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 302 | ((u32)GET_HOB_LENGTH(mrc_hob)), 16); |
| 303 | } |
| 304 | } |
| 305 | |
| 306 | /* Initialize the UPD parameters for MemoryInit */ |
Aaron Durbin | 6403167 | 2018-04-21 14:45:32 -0600 | [diff] [blame] | 307 | __weak void mainboard_memory_init_params( |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 308 | struct romstage_params *params, |
| 309 | MEMORY_INIT_UPD *upd_ptr) |
| 310 | { |
| 311 | printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__); |
| 312 | } |
| 313 | |
| 314 | /* Display the UPD parameters for MemoryInit */ |
Aaron Durbin | 6403167 | 2018-04-21 14:45:32 -0600 | [diff] [blame] | 315 | __weak void soc_display_memory_init_params( |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 316 | const MEMORY_INIT_UPD *old, MEMORY_INIT_UPD *new) |
| 317 | { |
| 318 | printk(BIOS_SPEW, "UPD values for MemoryInit:\n"); |
| 319 | hexdump32(BIOS_SPEW, new, sizeof(*new)); |
| 320 | } |
| 321 | |
| 322 | /* Initialize the UPD parameters for MemoryInit */ |
Aaron Durbin | 6403167 | 2018-04-21 14:45:32 -0600 | [diff] [blame] | 323 | __weak void soc_memory_init_params( |
Duncan Laurie | 9dcd4f0 | 2015-08-17 18:09:14 -0700 | [diff] [blame] | 324 | struct romstage_params *params, |
| 325 | MEMORY_INIT_UPD *upd) |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 326 | { |
| 327 | printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__); |
| 328 | } |
Frans Hendriks | 1385b7d | 2019-04-05 13:42:14 +0200 | [diff] [blame] | 329 | |
| 330 | /* Initialize the SoC after MemoryInit */ |
| 331 | __weak void mainboard_after_memory_init(void) |
| 332 | { |
| 333 | printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__); |
| 334 | } |