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review.coreboot.org / coreboot / 50863daef8ed75c0cb3dfd375e7622c898de5821 / . / src / mainboard / intel / kblrvp / acpi / mipi_camera.asl
blob: 0d1158dd370fa23f0a23f4aa1c2c706a5b1435e4 [file] [log] [blame]
Angel Pons60ec3652020-04-03 01:22:13 +0200[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-only */
V Sowmya0f307952017-07-18 12:08:13 +0530[diff] [blame]2
3Scope (\_SB.PCI0.I2C2)
4{
5 Device (PMIC)
6 {
7 Name (_HID, "INT3472") /* _HID: Hardware ID */
8 Name (_UID, Zero) // _UID: Unique ID */
9 Name (_DDN, "TPS68470 PMIC") /* _DDN: DOS Device Name */
10 Name (CAMD, 0x64)
11
12 Method (_STA, 0, NotSerialized) /* _STA: Status */
13 {
14 Return (0x0F)
15 }
16
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]17 /* Marks the availability of all the operation regions */
18 Name (AVP1, Zero)
19 Name (AVGP, Zero)
20 Name (AVB0, Zero)
21 Name (AVB1, Zero)
22 Name (AVB2, Zero)
23 Name (AVB3, Zero)
24 Method (_REG, 2, NotSerialized)
25 {
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]26 If (Arg0 == 0x08)
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]27 {
28 /* Marks the availability of GeneralPurposeIO
29 * 0x08: opregion space for GeneralPurposeIO
30 */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]31 AVGP = Arg1
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]32 }
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]33 If (Arg0 == 0xB0)
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]34 {
35 /* Marks the availability of
36 * TI_PMIC_POWER_OPREGION_ID */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]37 AVB0 = Arg1
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]38 }
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]39 If (Arg0 == 0xB1)
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]40 {
41 /* Marks the availability of
42 * TI_PMIC_VR_VAL_OPREGION_ID */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]43 AVB1 = Arg1
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]44 }
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]45 If (Arg0 == 0xB2)
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]46 {
47 /* Marks the availability of
48 * TI_PMIC_CLK_OPREGION_ID */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]49 AVB2 = Arg1
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]50 }
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]51 If (Arg0 == 0xB3)
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]52 {
53 /* Marks the availability of
54 * TI_PMIC_CLK_FREQ_OPREGION_ID */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]55 AVB3 = Arg1
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]56 }
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]57 If (AVGP && AVB0 && AVB1 && AVB2 && AVB3)
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]58 {
59 /* Marks the availability of all opregions */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]60 AVP1 = 1
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]61 }
62 Else
63 {
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]64 AVP1 = 0
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]65 }
66 }
67
68 OperationRegion (GPOP, GeneralPurposeIo, 0, 0x2)
V Sowmya0f307952017-07-18 12:08:13 +0530[diff] [blame]69 Name (_CRS, ResourceTemplate ()
70 {
71 I2cSerialBus (0x004D, ControllerInitiated, 0x00061A80,
72 AddressingMode7Bit, "\\_SB.PCI0.I2C2",
73 0x00, ResourceConsumer, ,
74 )
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]75 /* GPIO.9 is XSHUTDOWN pin for world facing camera */
76 GpioIo (Exclusive, PullDefault, 0x0000, 0x0000,
77 IoRestrictionOutputOnly, "\\_SB.PCI0.I2C2.PMIC",
78 0x00, ResourceConsumer,,)
79 {
80 9
81 }
V Sowmya0f307952017-07-18 12:08:13 +0530[diff] [blame]82 })
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]83
84 /* PMIC operation regions */
85 /* 0xB0: TI_PMIC_POWER_OPREGION_ID
86 * VSIO: Sensor IO LDO output
87 * VCMC: VCM LDO output
88 * VAX1: Auxiliary LDO1 output
89 * VAX2: Auxiliary LDO2 output
90 * VACT: Analog LDO output
91 * VDCT: Core buck output
92 */
93 OperationRegion (PWR1, 0xB0, Zero, 0x0100)
94 Field (PWR1, DWordAcc, NoLock, Preserve)
95 {
96 VSIO, 32,
97 VCMC, 32,
98 VAX1, 32,
99 VAX2, 32,
100 VACT, 32,
101 VDCT, 32,
102 }
103
104 /* 0xB1: TI_PMIC_VR_VAL_OPREGION_ID
105 * SIOV: VSIO VR voltage value
106 * IOVA: VIO VR voltage value
107 * VCMV: VCM VR voltage value
108 * AX1V: Auxiliary LDO1 VR voltage value
109 * AX2V: Auxiliary LDO2 VR voltage value
110 * ACVA: Analog LDO VR voltage
Martin Roth50863da2021-10-01 14:37:30 -0600[diff] [blame^]111 * DCVA: Core buck VR voltage
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]112 */
113 OperationRegion (PWR2, 0xB1, Zero, 0x0100)
114 Field (PWR2, DWordAcc, NoLock, Preserve)
115 {
116 SIOV, 32,
117 IOVA, 32,
118 VCMV, 32,
119 AX1V, 32,
120 AX2V, 32,
121 ACVA, 32,
122 DCVA, 32,
123 }
124
125 /* 0xB2: TI_PMIC_CLK_OPREGION_ID
126 * PCTL: PLL control register
127 * PCT2: PLL control 2 register
128 * CFG1: Clock configuration 1 register
129 * CFG2: Clock configuration 2 register
130 */
131 OperationRegion (CLKC, 0xB2, Zero, 0x0100)
132 Field (CLKC, DWordAcc, NoLock, Preserve)
133 {
134 PCTL, 32,
135 PCT2, 32,
136 CFG1, 32,
137 CFG2, 32,
138 }
139
140 /* 0xB3: TI_PMIC_CLK_FREQ_OPREGION_ID
141 * PDV2: PLL output divider for HCLK_B
142 * BODI: PLL output divider for boost clock
143 * BUDI: PLL output divider for buck clock
144 * PSWR: PLL reference clock setting
145 * XTDV: Reference crystal divider
146 * PLDV: PLL feedback divider
147 * PODV: PLL output divider for HCLK_A
148 */
149 OperationRegion (CLKF, 0xB3, Zero, 0x0100)
150 Field (CLKF, DWordAcc, NoLock, Preserve)
151 {
152 PDV2, 32,
153 BODI, 32,
154 BUDI, 32,
155 PSWR, 32,
156 XTDV, 32,
157 PLDV, 32,
158 PODV, 32,
159 }
160
161 Mutex (MUTC, 0)
162 Method (CLKE, 0, Serialized) {
163 /* save Acquire result so we can check for
164 Mutex acquired */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]165 Local0 = Acquire (MUTC, 1000)
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]166 /* check for Mutex acquired */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]167 If (Local0 == 0) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]168 /* Set boost clock divider */
169 BODI = 3
170 /* Set buck clock divider */
171 BUDI = 2
172 /* Set the PLL_REF_CLK cyles */
173 PSWR = 19
174 /* Set the reference crystal divider */
175 XTDV = 170
176 /* Set PLL feedback divider */
177 PLDV = 32
178 /* Set PLL output divider for HCLK_A */
179 PODV = 1
180 /* Enable HCLK_A clock.
181 * CFG1: output selection for HCLK_A.
182 * CFG2: set drive strength for HCLK_A.
183 */
184 CFG2 = 1
185 CFG1 = 2
186 /* Enable PLL output, crystal oscillator
187 * input capacitance control and set
188 * Xtal oscillator as clock source.
189 */
190 PCTL = 209
191 Sleep(1)
192 Release (MUTC)
193 }
194 }
195
196 Method (CLKD, 0, Serialized) {
197 /* save Acquire result so we can check for
198 Mutex acquired */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]199 Local0 = Acquire (MUTC, 1000)
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]200 /* check for Mutex acquired */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]201 If (Local0 == 0) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]202 BODI = 0
203 BUDI = 0
204 PSWR = 0
205 XTDV = 0
206 PLDV = 0
207 PODV = 0
208 /* Disable HCLK_A clock */
209 CFG2 = 0
210 CFG1 = 0
211 PCTL = 0
212 Release (MUTC)
213 }
214 }
215
216 /* Reference count for VSIO */
217 Mutex (MUTV, 0)
218 Name (VSIC, 0)
219 Method (DOVD, 1, Serialized) {
220 /* Save Acquire result so we can check for
221 Mutex acquired */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]222 Local0 = Acquire (MUTV, 1000)
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]223 /* Check for Mutex acquired */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]224 If (Local0 == 0) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]225 /* Turn off VSIO */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]226 If (Arg0 == 0) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]227 /* Decrement only if VSIC > 0 */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]228 if (VSIC > 0) {
229 VSIC--
230 If (VSIC == 0) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]231 VSIO = 0
232 }
233 }
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]234 } ElseIf (Arg0 == 1) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]235 /* Increment only if VSIC < 2 */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]236 If (VSIC < 2) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]237 /* Turn on VSIO */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]238 If (VSIC == 0) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]239 VSIO = 3
240 }
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]241 VSIC++
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]242 }
243 }
244
245 Release (MUTV)
246 }
247 }
248
249 /* Power resource methods for CAM0 */
250 PowerResource (OVTH, 0, 0) {
251 Name (STA, 0)
252 Method (_ON, 0, Serialized) {
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]253 If (AVP1 == 1) {
254 If (STA == 0) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]255 /* Enable VSIO regulator +
256 daisy chain */
257 DOVD(1)
258
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]259 if (IOVA != 52) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]260 /* Set VSIO value as
261 1.8006 V */
262 IOVA = 52
263 }
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]264 if (SIOV != 52) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]265 /* Set VSIO value as
266 1.8006 V */
267 SIOV = 52
268 }
269 Sleep(3)
270
271 VACT = 1
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]272 if (ACVA != 109) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]273 /* Set ANA at 2.8152V */
274 ACVA = 109
275 }
276 Sleep(3)
277
278 \_SB.PCI0.I2C2.PMIC.CLKE()
279
280 VDCT = 1
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]281 if (DCVA != 12) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]282 /* Set CORE at 1.2V */
283 DCVA = 12
284 }
285 Sleep(3)
286 \_SB.PCI0.I2C2.CAM0.CRST(1)
287 Sleep(5)
288
289 STA = 1
290 }
291 }
292 }
293
294 Method (_OFF, 0, Serialized) {
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]295 If (AVP1 == 1) {
296 If (STA == 1) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]297 Sleep(2)
298 \_SB.PCI0.I2C2.PMIC.CLKD()
299 Sleep(2)
300 \_SB.PCI0.I2C2.CAM0.CRST(0)
301 Sleep(3)
302 VDCT = 0
303 Sleep(3)
304 VACT = 0
305 Sleep(1)
306 DOVD(0)
307 Sleep(1)
308 }
309 }
310 STA = 0
311 }
312 Method (_STA, 0, NotSerialized) {
313 Return (STA)
314 }
315 }
316
317 /* Power resource methods for VCM */
318 PowerResource (VCMP, 0, 0) {
319 Name (STA, 0)
320 Method (_ON, 0, Serialized) {
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]321 If (AVP1 == 1) {
322 If (STA == 0) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]323 /* Enable VSIO regulator +
324 daisy chain */
325 DOVD(1)
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]326 if (IOVA != 52) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]327 /* Set VSIO value as
328 1.8006 V */
329 IOVA = 52
330 }
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]331 if (SIOV != 52) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]332 /* Set VSIO value as
333 1.8006 V */
334 SIOV = 52
335 }
336 Sleep(3)
337
338 /* Enable VCM regulator */
339 VCMC = 1
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]340 if (VCMV != 109) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]341 /* Set VCM value at
342 2.8152 V */
343 VCMV = 109
344 }
345 Sleep(3)
346
347 STA = 1
348 }
349 }
350 }
351
352 Method (_OFF, 0, Serialized) {
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]353 If (AVP1 == 1) {
354 If (STA == 1) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]355 VCMC = 0 /* Disable regulator */
356 Sleep(1)
357 DOVD(0) /* Disable regulator */
358 Sleep(1)
359 STA = 0
360 }
361 }
362 }
363
364 Method (_STA, 0, NotSerialized) {
365 Return (STA)
366 }
367 }
V Sowmya0f307952017-07-18 12:08:13 +0530[diff] [blame]368 }
369
370 Device (CAM0)
371 {
372 Name (_HID, "OVTID858") /* _HID: Hardware ID */
373 Name (_UID, Zero) /* _UID: Unique ID */
374 Name (_DDN, "OV 13858 Camera") /* _DDN: DOS Device Name */
375 Name (CAMD, 0x02)
376
377 Method (_STA, 0, NotSerialized) /* _STA: Status */
378 {
379 Return (0x0F)
380 }
381
382 Name (_DEP, Package() {\_SB.PCI0.I2C2.PMIC})
383 Name (_CRS, ResourceTemplate ()
384 {
385 I2cSerialBus (0x0010, ControllerInitiated, 0x00061A80,
386 AddressingMode7Bit, "\\_SB.PCI0.I2C2",
387 0x00, ResourceConsumer, ,
388 )
389 })
390
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]391 Field (\_SB.PCI0.I2C2.PMIC.GPOP, ByteAcc, NoLock, Preserve)
392 {
393 Connection
394 (
395 GpioIo (Exclusive, PullDefault, 0x0000, 0x0000,
396 IoRestrictionOutputOnly,
397 "\\_SB.PCI0.I2C2.PMIC", 0x00,
398 ResourceConsumer,,)
399 {
400 9
401 }
402 ),
403 GRST, 1,
404 }
405
406 /* Set or clear GRST GPIO */
407 Method (CRST, 1, Serialized)
408 {
409 GRST = Arg0
410 }
411
412 Name (_PR0, Package () { ^^I2C2.PMIC.OVTH })
413 Name (_PR3, Package () { ^^I2C2.PMIC.OVTH })
414
V Sowmya34e92a92017-07-18 16:18:18 +0530[diff] [blame]415 /* Port0 of CAM0 is connected to port0 of CIO2 device */
416 Name (_DSD, Package () {
417 ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
418 Package () {
419 Package () { "port0", "PRT0" },
420 },
421 ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
422 Package () {
423 Package () { "clock-frequency", 19200000 },
424 }
425 })
426
427 Name (PRT0, Package() {
428 ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
429 Package () {
430 Package () { "port", 0 },
431 },
432 ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
433 Package () {
434 Package () { "endpoint0", "EP00" },
435 }
436 })
437
438 Name (EP00, Package() {
439 ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
440 Package () {
441 Package () { "endpoint", 0 },
442 Package () { "clock-lanes", 0 },
443 Package () { "data-lanes",
444 Package () { 1, 2, 3, 4 }
445 },
446 Package () { "link-frequencies",
447 Package() { 1190400000, 640000000 }
448 },
449 Package () { "remote-endpoint",
450 Package() { \_SB.PCI0.CIO2, 0, 0 }
451 },
452 }
453 })
454
V Sowmya0f307952017-07-18 12:08:13 +0530[diff] [blame]455 Method (SSDB, 0, Serialized)
456 {
457 Return (Buffer (0x5E)
458 {
459 /* 0000 */ 0x00, 0x50, 0x00, 0x00, 0x00, 0x00,0x00, 0x00,
460 /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
461 /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
462 /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00,
463 /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
464 /* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
465 /* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
466 /* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
467 /* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
468 /* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x03,
469 /* 0050 */ 0x09, 0x00, 0x02, 0x01, 0x00, 0x01, 0x00, 0x36,
470 /* 0058 */ 0x6E, 0x01, 0x00, 0x00, 0x00, 0x00
471 })
472 }
473 }
474
475 Device (VCM0)
476 {
477 Name (_HID, "DWDWD000") /* _HID: Hardware ID */
478 Name (_UID, Zero) /* _UID: Unique ID */
479 Name (_DDN, "Dongwoon AF DAC") /* _DDN: DOS Device Name */
480 Name (CAMD, 0x03)
481
482 Method (_STA, 0, NotSerialized) /* _STA: Status */
483 {
484 Return (0x0F)
485 }
486
487 Name (_DEP, Package() {\_SB.PCI0.I2C2.PMIC})
488 Name (_CRS, ResourceTemplate ()
489 {
490 I2cSerialBus (0x000C, ControllerInitiated, 0x00061A80,
491 AddressingMode7Bit, "\\_SB.PCI0.I2C2",
492 0x00, ResourceConsumer, ,
493 )
494 })
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]495
496 Name (_PR0, Package () { ^PMIC.VCMP })
497 Name (_PR3, Package () { ^PMIC.VCMP })
V Sowmya0f307952017-07-18 12:08:13 +0530[diff] [blame]498 }
499}
500
501Scope (\_SB.PCI0.I2C3)
502{
503 Device (PMIC)
504 {
505 Name (_HID, "INT3473") /* _HID: Hardware ID */
506 Name (_UID, Zero) /* _UID: Unique ID */
507 Name (_DDN, "TPS68470 PMIC 2") /* _DDN: DOS Device Name */
508 Name (CAMD, 0x64)
509
510 Method (_STA, 0, NotSerialized) /* _STA: Status */
511 {
512 Return (0x0F)
513 }
514
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]515 /* Marks the availability of all the operation regions */
516 Name (AVP2, Zero)
517 Name (AVGP, Zero)
518 Name (AVB0, Zero)
519 Name (AVB1, Zero)
520 Name (AVB2, Zero)
521 Name (AVB3, Zero)
522 Method (_REG, 2, NotSerialized)
523 {
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]524 If (Arg0 == 0x08)
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]525 {
526 /* Marks the availability of GeneralPurposeIO
527 * 0x08: opregion space for GeneralPurposeIO
528 */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]529 AVGP = Arg1
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]530 }
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]531 If (Arg0 == 0xB0)
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]532 {
533 /* Marks the availability of
534 * TI_PMIC_POWER_OPREGION_ID */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]535 AVB0 = Arg1
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]536 }
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]537 If (Arg0 == 0xB1)
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]538 {
539 /* Marks the availability of
540 * TI_PMIC_VR_VAL_OPREGION_ID */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]541 AVB1 = Arg1
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]542 }
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]543 If (Arg0 == 0xB2)
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]544 {
545 /* Marks the availability of
546 * TI_PMIC_CLK_OPREGION_ID */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]547 AVB2 = Arg1
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]548 }
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]549 If (Arg0 == 0xB3)
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]550 {
551 /* Marks the availability of
552 * TI_PMIC_CLK_FREQ_OPREGION_ID */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]553 AVB3 = Arg1
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]554 }
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]555 If (AVGP && AVB0 && AVB1 && AVB2 && AVB3)
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]556 {
557 /* Marks the availability of all opregions */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]558 AVP2 = 1
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]559 }
560 Else
561 {
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]562 AVP2 = 0
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]563 }
564 }
565
566 OperationRegion (GPOP, GeneralPurposeIo, 0, 0x2)
V Sowmya0f307952017-07-18 12:08:13 +0530[diff] [blame]567 Name (_CRS, ResourceTemplate ()
568 {
569 I2cSerialBus (0x0049, ControllerInitiated, 0x00061A80,
570 AddressingMode7Bit, "\\_SB.PCI0.I2C3",
571 0x00, ResourceConsumer, ,
572 )
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]573 /* GPIO.4 is AVDD pin for user facing camera */
574 GpioIo (Exclusive, PullDefault, 0x0000, 0x0000,
575 IoRestrictionOutputOnly, "\\_SB.PCI0.I2C3.PMIC",
576 0x00, ResourceConsumer,,)
577 {
578 4
579 }
580 /* GPIO.5 is XSHUTDOWN pin for user facing camera */
581 GpioIo (Exclusive, PullDefault, 0x0000, 0x0000,
582 IoRestrictionOutputOnly, "\\_SB.PCI0.I2C3.PMIC",
583 0x00, ResourceConsumer,,)
584 {
585 5
586 }
V Sowmya0f307952017-07-18 12:08:13 +0530[diff] [blame]587 })
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]588
589 /* PMIC operation regions */
590 /* 0xB0: TI_PMIC_POWER_OPREGION_ID
591 * VSIO: Sensor IO LDO output
592 * VCMC: VCM LDO output
593 * VAX1: Auxiliary LDO1 output
594 * VAX2: Auxiliary LDO2 output
595 * VACT: Analog LDO output
596 * VDCT: Core buck output
597 */
598 OperationRegion (PWR1, 0xB0, Zero, 0x0100)
599 Field (PWR1, DWordAcc, NoLock, Preserve)
600 {
601 VSIO, 32,
602 VCMC, 32,
603 VAX1, 32,
604 VAX2, 32,
605 VACT, 32,
606 VDCT, 32,
607 }
608
609 /* 0xB1: TI_PMIC_VR_VAL_OPREGION_ID
610 * SIOV: VSIO VR voltage value
611 * IOVA: VIO VR voltage value
612 * VCMV: VCM VR voltage value
613 * AX1V: Auxiliary LDO1 VR voltage value
614 * AX2V: Auxiliary LDO2 VR voltage value
615 * ACVA: Analog LDO VR voltage
Martin Roth50863da2021-10-01 14:37:30 -0600[diff] [blame^]616 * DCVA: Core buck VR voltage
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]617 */
618 OperationRegion (PWR2, 0xB1, Zero, 0x0100)
619 Field (PWR2, DWordAcc, NoLock, Preserve)
620 {
621 SIOV, 32,
622 IOVA, 32,
623 VCMV, 32,
624 AX1V, 32,
625 AX2V, 32,
626 ACVA, 32,
627 DCVA, 32,
628 }
629
630 /* 0xB2: TI_PMIC_CLK_OPREGION_ID
631 * PCTL: PLL control register
632 * PCT2: PLL control 2 register
633 * CFG1: Clock configuration 1 register
634 * CFG2: Clock configuration 2 register
635 */
636 OperationRegion (CLKC, 0xB2, Zero, 0x0100)
637 Field (CLKC, DWordAcc, NoLock, Preserve)
638 {
639 PCTL, 32,
640 PCT2, 32,
641 CFG1, 32,
642 CFG2, 32,
643 }
644
645 /* 0xB3: TI_PMIC_CLK_FREQ_OPREGION_ID
646 * PDV2: PLL output divider for HCLK_B
647 * BODI: PLL output divider for boost clock
648 * BUDI: PLL output divider for buck clock
649 * PSWR: PLL reference clock setting
650 * XTDV: Reference crystal divider
651 * PLDV: PLL feedback divider
652 * PODV: PLL output divider for HCLK_A
653 */
654 OperationRegion (CLKF, 0xB3, Zero, 0x0100)
655 Field (CLKF, DWordAcc, NoLock, Preserve)
656 {
657 PDV2, 32,
658 BODI, 32,
659 BUDI, 32,
660 PSWR, 32,
661 XTDV, 32,
662 PLDV, 32,
663 PODV, 32,
664 }
665
666 Mutex (MUTC, 0)
667 Method (CLKE, 0, Serialized) {
668 /* save Acquire result so we can check for
669 Mutex acquired */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]670 Local0 = Acquire (MUTC, 1000)
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]671 /* check for Mutex acquired */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]672 If (Local0 == 0) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]673 /* Set boost clock divider */
674 BODI = 3
675 /* Set buck clock divider */
676 BUDI = 2
677 /* Set the PLL_REF_CLK cyles */
678 PSWR = 19
679 /* Set the reference crystal divider */
680 XTDV = 170
681 /* Set PLL feedback divider */
682 PLDV = 32
683 /* Set PLL output divider for HCLK_A */
684 PODV = 1
685 /* Enable HCLK_A clock.
686 * CFG1: output selection for HCLK_A.
687 * CFG2: set drive strength for HCLK_A.
688 */
689 CFG2 = 1
690 CFG1 = 2
691 /* Enable PLL output, crystal oscillator
692 * input capacitance control and set
693 * Xtal oscillator as clock source.
694 */
695 PCTL = 209
696 Sleep(1)
697 Release (MUTC)
698 }
699 }
700
701 Method (CLKD, 0, Serialized) {
702 /* save Acquire result so we can check for
703 Mutex acquired */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]704 Local0 = Acquire (MUTC, 1000)
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]705 /* check for Mutex acquired */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]706 If (Local0 == 0) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]707 BODI = 0
708 BUDI = 0
709 PSWR = 0
710 XTDV = 0
711 PLDV = 0
712 PODV = 0
713 /* Disable HCLK_A clock */
714 CFG2 = 0
715 CFG1 = 0
716 PCTL = 0
717 Release (MUTC)
718 }
719 }
720
721 /* Reference count for VSIO */
722 Mutex (MUTV, 0)
723 Name (VSIC, 0)
724 Method (DOVD, 1, Serialized) {
725 /* Save Acquire result so we can check for
726 Mutex acquired */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]727 Local0 = Acquire (MUTV, 1000)
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]728 /* Check for Mutex acquired */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]729 If (Local0 == 0) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]730 /* Turn off VSIO */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]731 If (Arg0 == 0) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]732 VSIO = 0
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]733 } ElseIf (Arg0 == 1) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]734 VSIO = 3
735 }
736 Release (MUTV)
737 }
738 }
739
740 /* Power resource methods for CAM1 */
741 PowerResource (OVFI, 0, 0) {
742 Name (STA, 0)
743 Method (_ON, 0, Serialized) {
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]744 If (AVP2 == 1) {
745 If (STA == 0) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]746 /* Enable VSIO regulator +
747 daisy chain */
748 DOVD(1)
749
750 VAX2 = 1 /* Enable VAUX2 */
751
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]752 if (AX2V != 52) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]753 /* Set VAUX2 as
754 1.8006 V */
755 AX2V = 52
756 }
757 Sleep(1)
758
759 \_SB.PCI0.I2C3.PMIC.CLKE()
760
761 VAX1 = 1 /* Enable VAUX1 */
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]762 if (AX1V != 19) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]763 /* Set VAUX1 as 1.2132V */
764 AX1V = 19
765 }
766 Sleep(3)
767
768 \_SB.PCI0.I2C3.CAM1.CGP4(1)
769 Sleep(3)
770
771 \_SB.PCI0.I2C3.CAM1.CGP5(1)
772 Sleep(5)
773 STA = 1
774 }
775 }
776 }
777
778 Method (_OFF, 0, Serialized) {
Elyes HAOUASf2042092020-10-06 13:36:45 +0200[diff] [blame]779 If (AVP2 == 1) {
780 If (STA == 1) {
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]781 Sleep(2)
782 \_SB.PCI0.I2C3.PMIC.CLKD()
783 Sleep(2)
784 \_SB.PCI0.I2C3.CAM1.CGP5(0)
785 Sleep(3)
786 VAX1 = 0
787 Sleep(1)
788 \_SB.PCI0.I2C3.CAM1.CGP4(0)
789 Sleep(1)
790 VAX2 = 0
791 Sleep(1)
792 DOVD(0)
793 Sleep(1)
794
795 }
796 STA = 0
797 }
798 }
799
800 Method (_STA, 0, NotSerialized) {
801 Return (STA)
802 }
803 }
V Sowmya0f307952017-07-18 12:08:13 +0530[diff] [blame]804 }
805
806 Device (CAM1)
807 {
808 Name (_HID, "INT3479") /* _HID: Hardware ID */
809 Name (_UID, Zero) /* _UID: Unique ID */
810 Name (_DDN, "OV 5670 Camera") /* _DDN: DOS Device Name */
811 Name (CAMD, 0x02)
812
813 Method (_STA, 0, NotSerialized) /* _STA: Status */
814 {
815 Return (0x0F)
816 }
817
818 Name (_DEP, Package() {\_SB.PCI0.I2C3.PMIC})
819 Name (_CRS, ResourceTemplate ()
820 {
821 I2cSerialBus (0x0010, ControllerInitiated, 0x00061A80,
822 AddressingMode7Bit, "\\_SB.PCI0.I2C3",
823 0x00, ResourceConsumer, ,
824 )
825 })
826
V Sowmyaf19ee0d2017-07-20 11:12:33 +0530[diff] [blame]827 Field (\_SB.PCI0.I2C3.PMIC.GPOP, ByteAcc, NoLock, Preserve)
828 {
829 Connection
830 (
831 GpioIo (Exclusive, PullDefault, 0x0000, 0x0000,
832 IoRestrictionOutputOnly,
833 "\\_SB.PCI0.I2C3.PMIC", 0x00,
834 ResourceConsumer,,)
835 {
836 4
837 }
838 ),
839 GPO4, 1,
840 Connection
841 (
842 GpioIo (Exclusive, PullDefault, 0x0000, 0x0000,
843 IoRestrictionOutputOnly,
844 "\\_SB.PCI0.I2C3.PMIC", 0x00,
845 ResourceConsumer,,)
846 {
847 5
848 }
849 ),
850 GPO5, 1,
851 }
852
853 /* Set or clear GPO4 GPIO */
854 Method (CGP4, 1, Serialized)
855 {
856 GPO4 = Arg0
857 }
858
859 /* Set or clear GPO5 GPIO */
860 Method (CGP5, 1, Serialized)
861 {
862 GPO5 = Arg0
863 }
864
865 Name (_PR0, Package () { ^^I2C3.PMIC.OVFI })
866 Name (_PR3, Package () { ^^I2C3.PMIC.OVFI })
867
V Sowmya34e92a92017-07-18 16:18:18 +0530[diff] [blame]868 /* Port0 of CAM1 is connected to port1 of CIO2 device */
869 Name (_DSD, Package () {
870 ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
871 Package () {
872 Package () { "port0", "PRT0" },
873 },
874 ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
875 Package () {
876 Package () { "clock-frequency", 19200000 },
877 }
878 })
879
880 Name (PRT0, Package() {
881 ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
882 Package () {
883 Package () { "port", 0 },
884 },
885 ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
886 Package () {
887 Package () { "endpoint0", "EP00" },
888 }
889 })
890
891 Name (EP00, Package() {
892 ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
893 Package () {
894 Package () { "endpoint", 0 },
895 Package () { "clock-lanes", 0 },
896 Package () { "data-lanes",
897 Package () { 1, 2 }
898 },
899 Package () { "link-frequencies",
900 Package() { 844800000 }
901 },
902 Package () { "remote-endpoint",
903 Package() { \_SB.PCI0.CIO2, 1, 0 }
904 },
905 }
906 })
907
V Sowmya0f307952017-07-18 12:08:13 +0530[diff] [blame]908 Method (SSDB, 0, Serialized)
909 {
910 Return (Buffer (0x5E)
911 {
912 /* 0000 */ 0x00, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
913 /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
914 /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
915 /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00,
916 /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
917 /* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
918 /* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
919 /* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
920 /* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
921 /* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x03,
922 /* 0050 */ 0x09, 0x00, 0x02, 0x01, 0x00, 0x01, 0x00, 0x36,
923 /* 0058 */ 0x6E, 0x01, 0x00, 0x00, 0x00, 0x00
924 })
925 }
926 }
927}