blob: dc286a8f5033c3d2cb4fb72e409d1bbabb78df05 [file] [log] [blame]
Robert Chenff153962023-08-18 04:38:03 -04001/* SPDX-License-Identifier: GPL-2.0-or-later */
2
3#include <baseboard/gpio.h>
4#include <baseboard/variants.h>
5#include <console/console.h>
6#include <fw_config.h>
7
8
9static const struct pad_config lte_disable_pads[] = {
10 /* A8 : WWAN_RF_DISABLE_ODL */
11 PAD_NC(GPP_A8, NONE),
Robert Chen242bed22023-08-23 02:36:50 -040012 /* B5 : I2C_P_SENSOR_SDA */
13 PAD_NC(GPP_B5, NONE),
14 /* B6 : I2C_P_SENSOR_SCL */
15 PAD_NC(GPP_B6, NONE),
Robert Chenff153962023-08-18 04:38:03 -040016 /* D6 : WWAN_EN */
17 PAD_NC(GPP_D6, NONE),
18 /* F12 : WWAN_RST_L */
19 PAD_NC(GPP_F12, NONE),
Robert Chen242bed22023-08-23 02:36:50 -040020 /* H19 : P_SENSOR_INT_L */
21 PAD_NC(GPP_H19, NONE),
Robert Chenff153962023-08-18 04:38:03 -040022 /* H23 : WWAN_SAR_DETECT_ODL */
23 PAD_NC(GPP_H23, NONE),
24};
25
Robert Chenff153962023-08-18 04:38:03 -040026static const struct pad_config emmc_disable_pads[] = {
27 /* I7 : EMMC_CMD */
28 PAD_NC(GPP_I7, NONE),
29 /* I8 : EMMC_D0 */
30 PAD_NC(GPP_I8, NONE),
31 /* I9 : EMMC_D1 */
32 PAD_NC(GPP_I9, NONE),
33 /* I10 : EMMC_D2 */
34 PAD_NC(GPP_I10, NONE),
35 /* I11 : EMMC_D3 */
36 PAD_NC(GPP_I11, NONE),
37 /* I12 : EMMC_D4 */
38 PAD_NC(GPP_I12, NONE),
39 /* I13 : EMMC_D5 */
40 PAD_NC(GPP_I13, NONE),
41 /* I14 : EMMC_D6 */
42 PAD_NC(GPP_I14, NONE),
43 /* I15 : EMMC_D7 */
44 PAD_NC(GPP_I15, NONE),
45 /* I16 : EMMC_RCLK */
46 PAD_NC(GPP_I16, NONE),
47 /* I17 : EMMC_CLK */
48 PAD_NC(GPP_I17, NONE),
49 /* I18 : EMMC_RST_L */
50 PAD_NC(GPP_I18, NONE),
51};
52
53static const struct pad_config stylus_disable_pads[] = {
54 /* F13 : SOC_PEN_DETECT_R_ODL */
55 PAD_NC_LOCK(GPP_F13, NONE, LOCK_CONFIG),
56 /* F15 : SOC_PEN_DETECT_ODL */
57 PAD_NC_LOCK(GPP_F15, NONE, LOCK_CONFIG),
58};
59
Robert Chen76a3d772023-10-05 02:59:58 -040060static const struct pad_config sd_disable_pads[] = {
61 /* D8 : SD_CLKREQ_ODL */
62 PAD_NC(GPP_D8, NONE),
63 /* D17 : SD_WAKE_N */
64 PAD_NC_LOCK(GPP_D17, NONE, LOCK_CONFIG),
65 /* H12 : SD_PERST_L */
66 PAD_NC_LOCK(GPP_H12, NONE, LOCK_CONFIG),
67 /* H13 : EN_PP3300_SD_X */
68 PAD_NC_LOCK(GPP_H13, NONE, LOCK_CONFIG),
69};
70
Robert Chenff153962023-08-18 04:38:03 -040071static const struct pad_config disable_wifi_pch_susclk[] = {
72 /* GPD8 ==> NC */
73 PAD_NC(GPD8, NONE),
74};
75
76void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
77{
Robert Chen50829632023-11-28 02:24:58 -050078 if (!fw_config_probe(FW_CONFIG(DB_USB, DB_1C_LTE)) &&
79 !fw_config_probe(FW_CONFIG(DB_USB, DB_LTE))) {
Robert Chenff153962023-08-18 04:38:03 -040080 printk(BIOS_INFO, "Disable LTE-related GPIO pins.\n");
81 gpio_padbased_override(padbased_table, lte_disable_pads,
82 ARRAY_SIZE(lte_disable_pads));
83 }
Robert Chenff153962023-08-18 04:38:03 -040084 if (fw_config_is_provisioned() && !fw_config_probe(FW_CONFIG(STORAGE, STORAGE_EMMC))) {
85 printk(BIOS_INFO, "Disable eMMC GPIO pins.\n");
86 gpio_padbased_override(padbased_table, emmc_disable_pads,
87 ARRAY_SIZE(emmc_disable_pads));
88 }
89 if (fw_config_probe(FW_CONFIG(STYLUS, STYLUS_ABSENT))) {
90 printk(BIOS_INFO, "Disable Stylus GPIO pins.\n");
91 gpio_padbased_override(padbased_table, stylus_disable_pads,
92 ARRAY_SIZE(stylus_disable_pads));
93 }
Robert Chen76a3d772023-10-05 02:59:58 -040094 if (fw_config_probe(FW_CONFIG(SD_CARD, SD_ABSENT))) {
95 printk(BIOS_INFO, "Disable SD card GPIO pins.\n");
96 gpio_padbased_override(padbased_table, sd_disable_pads,
97 ARRAY_SIZE(sd_disable_pads));
98 }
Robert Chenff153962023-08-18 04:38:03 -040099 if (fw_config_probe(FW_CONFIG(WIFI_SAR_ID, SAR_ID_3))) {
100 printk(BIOS_INFO, "Disable PCH SUSCLK.\n");
101 gpio_padbased_override(padbased_table, disable_wifi_pch_susclk,
102 ARRAY_SIZE(disable_wifi_pch_susclk));
103 }
104}