Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | #include <console/console.h> |
| 21 | #include <device/device.h> |
| 22 | #include <device/pci.h> |
| 23 | #include <arch/io.h> |
Stefan Reinauer | 23836e2 | 2010-04-15 12:39:29 +0000 | [diff] [blame] | 24 | #include <boot/tables.h> |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 25 | #include <cpu/x86/msr.h> |
| 26 | #include <cpu/amd/mtrr.h> |
| 27 | #include <device/pci_def.h> |
Stefan Reinauer | 23836e2 | 2010-04-15 12:39:29 +0000 | [diff] [blame] | 28 | #include <southbridge/amd/sb600/sb600.h> |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 29 | #include "chip.h" |
| 30 | |
| 31 | #define ADT7461_ADDRESS 0x4C |
| 32 | #define ARA_ADDRESS 0x0C /* Alert Response Address */ |
| 33 | #define SMBUS_IO_BASE 0x1000 |
| 34 | |
| 35 | extern int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address); |
| 36 | extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, |
| 37 | u8 val); |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 38 | #define ADT7461_read_byte(address) \ |
| 39 | do_smbus_read_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address) |
| 40 | #define ARA_read_byte(address) \ |
| 41 | do_smbus_read_byte(SMBUS_IO_BASE, ARA_ADDRESS, address) |
| 42 | #define ADT7461_write_byte(address, val) \ |
| 43 | do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val) |
| 44 | |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 45 | |
| 46 | |
| 47 | |
| 48 | /*************************************************** |
Libra Li | 7d3649a | 2009-10-13 16:56:58 +0000 | [diff] [blame] | 49 | * This board, the TIM-8690 has two Marvel 88e5056 PCI-E |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 50 | * 10/100/1000 chips on board. |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 51 | * Both of their pin PERSTn pins are connected to GPIO 5 of the |
| 52 | * SB600 southbridge. |
| 53 | ****************************************************/ |
Stefan Reinauer | 4154c66 | 2010-04-14 10:12:23 +0000 | [diff] [blame] | 54 | static void enable_onboard_nic(void) |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 55 | { |
| 56 | |
Libra Li | 7d3649a | 2009-10-13 16:56:58 +0000 | [diff] [blame] | 57 | u8 byte; |
| 58 | device_t sm_dev; |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 59 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 60 | printk(BIOS_INFO, "enable_onboard_nic.\n"); |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 61 | |
Libra Li | 7d3649a | 2009-10-13 16:56:58 +0000 | [diff] [blame] | 62 | sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 63 | |
Libra Li | 7d3649a | 2009-10-13 16:56:58 +0000 | [diff] [blame] | 64 | byte = pci_read_config8(sm_dev, 0x9a); |
| 65 | byte |= ( 1 << 7); |
| 66 | pci_write_config8(sm_dev, 0x9a, byte); |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 67 | |
Libra Li | 7d3649a | 2009-10-13 16:56:58 +0000 | [diff] [blame] | 68 | byte=pm_ioread(0x59); |
| 69 | byte &= ~( 1<< 5); |
| 70 | pm_iowrite(0x59,byte); |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 71 | |
Libra Li | 7d3649a | 2009-10-13 16:56:58 +0000 | [diff] [blame] | 72 | byte = pci_read_config8(sm_dev, 0xA8); |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 73 | |
Libra Li | 7d3649a | 2009-10-13 16:56:58 +0000 | [diff] [blame] | 74 | byte |= (1 << 1); //set bit 1 to high |
| 75 | pci_write_config8(sm_dev, 0xA8, byte); |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 76 | } |
| 77 | |
| 78 | /* set thermal config |
| 79 | */ |
Stefan Reinauer | 4154c66 | 2010-04-14 10:12:23 +0000 | [diff] [blame] | 80 | static void set_thermal_config(void) |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 81 | { |
| 82 | u8 byte; |
| 83 | u16 word; |
| 84 | device_t sm_dev; |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 85 | |
| 86 | /* set ADT 7461 */ |
| 87 | ADT7461_write_byte(0x0B, 0x50); /* Local Temperature Hight limit */ |
| 88 | ADT7461_write_byte(0x0C, 0x00); /* Local Temperature Low limit */ |
| 89 | ADT7461_write_byte(0x0D, 0x50); /* External Temperature Hight limit High Byte */ |
| 90 | ADT7461_write_byte(0x0E, 0x00); /* External Temperature Low limit High Byte */ |
| 91 | |
| 92 | ADT7461_write_byte(0x19, 0x55); /* External THERM limit */ |
| 93 | ADT7461_write_byte(0x20, 0x55); /* Local THERM limit */ |
| 94 | |
| 95 | byte = ADT7461_read_byte(0x02); /* read status register to clear it */ |
| 96 | ARA_read_byte(0x05); /* A hardware alert can only be cleared by the master sending an ARA as a read command */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 97 | printk(BIOS_INFO, "Init adt7461 end , status 0x02 %02x\n", byte); |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 98 | |
| 99 | /* sb600 settings for thermal config */ |
| 100 | /* set SB600 GPIO 64 to GPIO with pull-up */ |
| 101 | byte = pm2_ioread(0x42); |
| 102 | byte &= 0x3f; |
| 103 | pm2_iowrite(0x42, byte); |
| 104 | |
| 105 | /* set GPIO 64 to input */ |
| 106 | sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); |
Carl-Daniel Hailfinger | 513e03b | 2009-09-22 09:43:25 +0000 | [diff] [blame] | 107 | word = pci_read_config16(sm_dev, 0x56); |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 108 | word |= 1 << 7; |
Carl-Daniel Hailfinger | 513e03b | 2009-09-22 09:43:25 +0000 | [diff] [blame] | 109 | pci_write_config16(sm_dev, 0x56, word); |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 110 | |
| 111 | /* set GPIO 64 internal pull-up */ |
| 112 | byte = pm2_ioread(0xf0); |
| 113 | byte &= 0xee; |
| 114 | pm2_iowrite(0xf0, byte); |
| 115 | |
| 116 | /* set Talert to be active low */ |
| 117 | byte = pm_ioread(0x67); |
| 118 | byte &= ~(1 << 5); |
| 119 | pm_iowrite(0x67, byte); |
| 120 | |
| 121 | /* set Talert to generate ACPI event */ |
| 122 | byte = pm_ioread(0x3c); |
| 123 | byte &= 0xf3; |
| 124 | pm_iowrite(0x3c, byte); |
| 125 | |
| 126 | /* THERMTRIP pin */ |
| 127 | /* byte = pm_ioread(0x68); |
| 128 | * byte |= 1 << 3; |
| 129 | * pm_iowrite(0x68, byte); |
| 130 | * |
| 131 | * byte = pm_ioread(0x55); |
| 132 | * byte |= 1 << 0; |
| 133 | * pm_iowrite(0x55, byte); |
| 134 | * |
| 135 | * byte = pm_ioread(0x67); |
| 136 | * byte &= ~( 1 << 6); |
| 137 | * pm_iowrite(0x67, byte); |
| 138 | */ |
| 139 | } |
| 140 | |
| 141 | /************************************************* |
| 142 | * enable the dedicated function in tim8690 board. |
| 143 | * This function called early than rs690_enable. |
| 144 | *************************************************/ |
Stefan Reinauer | 523ebd9 | 2010-04-14 18:59:42 +0000 | [diff] [blame] | 145 | static void tim8690_enable(device_t dev) |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 146 | { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 147 | printk(BIOS_INFO, "Mainboard tim8690 Enable. dev=0x%p\n", dev); |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 148 | |
Kyösti Mälkki | ba589e3 | 2012-07-11 08:03:13 +0300 | [diff] [blame] | 149 | setup_uma_memory(); |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 150 | |
| 151 | enable_onboard_nic(); |
| 152 | set_thermal_config(); |
| 153 | } |
| 154 | |
| 155 | int add_mainboard_resources(struct lb_memory *mem) |
| 156 | { |
Stefan Reinauer | 523ebd9 | 2010-04-14 18:59:42 +0000 | [diff] [blame] | 157 | return 0; |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 158 | } |
| 159 | |
Daniel Toussaint | da6d92b | 2009-04-06 13:38:54 +0000 | [diff] [blame] | 160 | struct chip_operations mainboard_ops = { |
| 161 | CHIP_NAME("TechNexion TIM-8690 Mainboard") |
| 162 | .enable_dev = tim8690_enable, |
| 163 | }; |