Stefan Reinauer | c270e89 | 2009-10-13 16:47:57 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | #include <console/console.h> |
| 21 | #include <device/device.h> |
| 22 | #include <device/pci.h> |
| 23 | #include <arch/io.h> |
Stefan Reinauer | 23836e2 | 2010-04-15 12:39:29 +0000 | [diff] [blame] | 24 | #include <boot/tables.h> |
Stefan Reinauer | c270e89 | 2009-10-13 16:47:57 +0000 | [diff] [blame] | 25 | #include <cpu/x86/msr.h> |
| 26 | #include <cpu/amd/mtrr.h> |
| 27 | #include <device/pci_def.h> |
Stefan Reinauer | 523ebd9 | 2010-04-14 18:59:42 +0000 | [diff] [blame] | 28 | #include <southbridge/amd/sb600/sb600.h> |
Stefan Reinauer | c270e89 | 2009-10-13 16:47:57 +0000 | [diff] [blame] | 29 | #include "chip.h" |
| 30 | |
| 31 | #define ADT7461_ADDRESS 0x4C |
| 32 | #define ARA_ADDRESS 0x0C /* Alert Response Address */ |
| 33 | #define SMBUS_IO_BASE 0x1000 |
| 34 | |
| 35 | extern int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address); |
| 36 | extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, |
| 37 | u8 val); |
Stefan Reinauer | c270e89 | 2009-10-13 16:47:57 +0000 | [diff] [blame] | 38 | #define ADT7461_read_byte(address) \ |
| 39 | do_smbus_read_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address) |
| 40 | #define ARA_read_byte(address) \ |
| 41 | do_smbus_read_byte(SMBUS_IO_BASE, ARA_ADDRESS, address) |
| 42 | #define ADT7461_write_byte(address, val) \ |
| 43 | do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val) |
| 44 | |
Stefan Reinauer | c270e89 | 2009-10-13 16:47:57 +0000 | [diff] [blame] | 45 | |
| 46 | /******************************************************** |
| 47 | * dbm690t uses a BCM5789 as on-board NIC. |
| 48 | * It has a pin named LOW_POWER to enable it into LOW POWER state. |
| 49 | * In order to run NIC, we should let it out of Low power state. This pin is |
| 50 | * controlled by sb600 GPM3. |
| 51 | * RRG4.2.3 GPM as GPIO |
| 52 | * GPM pins can be used as GPIO. The GPM I/O functions is controlled by three registers: |
| 53 | * I/O C50, C51, C52, PM I/O94, 95, 96. |
| 54 | * RRG4.2.3.1 GPM pins as Input |
| 55 | * RRG4.2.3.2 GPM pins as Output |
| 56 | ********************************************************/ |
Stefan Reinauer | 4154c66 | 2010-04-14 10:12:23 +0000 | [diff] [blame] | 57 | static void enable_onboard_nic(void) |
Stefan Reinauer | c270e89 | 2009-10-13 16:47:57 +0000 | [diff] [blame] | 58 | { |
| 59 | u8 byte; |
| 60 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 61 | printk(BIOS_INFO, "%s.\n", __func__); |
Stefan Reinauer | c270e89 | 2009-10-13 16:47:57 +0000 | [diff] [blame] | 62 | |
| 63 | /* set index register 0C50h to 13h (miscellaneous control) */ |
| 64 | outb(0x13, 0xC50); /* CMIndex */ |
| 65 | |
| 66 | /* set CM data register 0C51h bits [7:6] to 01b to set Input/Out control */ |
| 67 | byte = inb(0xC51); |
| 68 | byte &= 0x3F; |
| 69 | byte |= 0x40; |
| 70 | outb(byte, 0xC51); |
| 71 | |
| 72 | /* set GPM port 0C52h bit 3 to 0 to enable output for GPM3 */ |
| 73 | byte = inb(0xC52); |
| 74 | byte &= ~0x8; |
| 75 | outb(byte, 0xC52); |
| 76 | |
| 77 | /* set CM data register 0C51h bits [7:6] to 10b to set Output state control */ |
| 78 | byte = inb(0xC51); |
| 79 | byte &= 0x3F; |
| 80 | byte |= 0x80; /* 7:6=10 */ |
| 81 | outb(byte, 0xC51); |
| 82 | |
| 83 | /* set GPM port 0C52h bit 3 to 0 to output 0 on GPM3 */ |
| 84 | byte = inb(0xC52); |
| 85 | byte &= ~0x8; |
| 86 | outb(byte, 0xC52); |
| 87 | } |
| 88 | |
| 89 | /******************************************************** |
| 90 | * dbm690t uses SB600 GPIO9 to detect IDE_DMA66. |
| 91 | * IDE_DMA66 is routed to GPIO 9. So we read Gpio 9 to |
| 92 | * get the cable type, 40 pin or 80 pin? |
| 93 | ********************************************************/ |
Stefan Reinauer | 4154c66 | 2010-04-14 10:12:23 +0000 | [diff] [blame] | 94 | static void get_ide_dma66(void) |
Stefan Reinauer | c270e89 | 2009-10-13 16:47:57 +0000 | [diff] [blame] | 95 | { |
| 96 | u8 byte; |
| 97 | struct device *sm_dev; |
| 98 | struct device *ide_dev; |
| 99 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 100 | printk(BIOS_INFO, "%s.\n", __func__); |
Stefan Reinauer | c270e89 | 2009-10-13 16:47:57 +0000 | [diff] [blame] | 101 | sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); |
| 102 | |
| 103 | byte = pci_read_config8(sm_dev, 0xA9); |
| 104 | byte |= (1 << 5); /* Set Gpio9 as input */ |
| 105 | pci_write_config8(sm_dev, 0xA9, byte); |
| 106 | |
| 107 | ide_dev = dev_find_slot(0, PCI_DEVFN(0x14, 1)); |
| 108 | byte = pci_read_config8(ide_dev, 0x56); |
| 109 | byte &= ~(7 << 0); |
| 110 | if ((1 << 5) & pci_read_config8(sm_dev, 0xAA)) |
| 111 | byte |= 2 << 0; /* mode 2 */ |
| 112 | else |
| 113 | byte |= 5 << 0; /* mode 5 */ |
| 114 | pci_write_config8(ide_dev, 0x56, byte); |
| 115 | } |
| 116 | |
| 117 | /* |
| 118 | * set thermal config |
| 119 | */ |
Stefan Reinauer | 4154c66 | 2010-04-14 10:12:23 +0000 | [diff] [blame] | 120 | static void set_thermal_config(void) |
Stefan Reinauer | c270e89 | 2009-10-13 16:47:57 +0000 | [diff] [blame] | 121 | { |
| 122 | u8 byte; |
| 123 | u16 word; |
| 124 | device_t sm_dev; |
| 125 | |
| 126 | /* set ADT 7461 */ |
| 127 | ADT7461_write_byte(0x0B, 0x50); /* Local Temperature Hight limit */ |
| 128 | ADT7461_write_byte(0x0C, 0x00); /* Local Temperature Low limit */ |
| 129 | ADT7461_write_byte(0x0D, 0x50); /* External Temperature Hight limit High Byte */ |
| 130 | ADT7461_write_byte(0x0E, 0x00); /* External Temperature Low limit High Byte */ |
| 131 | |
| 132 | ADT7461_write_byte(0x19, 0x55); /* External THERM limit */ |
| 133 | ADT7461_write_byte(0x20, 0x55); /* Local THERM limit */ |
| 134 | |
| 135 | byte = ADT7461_read_byte(0x02); /* read status register to clear it */ |
| 136 | ARA_read_byte(0x05); /* A hardware alert can only be cleared by the master sending an ARA as a read command */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 137 | printk(BIOS_INFO, "Init adt7461 end , status 0x02 %02x\n", byte); |
Stefan Reinauer | c270e89 | 2009-10-13 16:47:57 +0000 | [diff] [blame] | 138 | |
| 139 | /* sb600 settings for thermal config */ |
| 140 | /* set SB600 GPIO 64 to GPIO with pull-up */ |
| 141 | byte = pm2_ioread(0x42); |
| 142 | byte &= 0x3f; |
| 143 | pm2_iowrite(0x42, byte); |
| 144 | |
| 145 | /* set GPIO 64 to input */ |
| 146 | sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); |
| 147 | word = pci_read_config16(sm_dev, 0x56); |
| 148 | word |= 1 << 7; |
| 149 | pci_write_config16(sm_dev, 0x56, word); |
| 150 | |
| 151 | /* set GPIO 64 internal pull-up */ |
| 152 | byte = pm2_ioread(0xf0); |
| 153 | byte &= 0xee; |
| 154 | pm2_iowrite(0xf0, byte); |
| 155 | |
| 156 | /* set Talert to be active low */ |
| 157 | byte = pm_ioread(0x67); |
| 158 | byte &= ~(1 << 5); |
| 159 | pm_iowrite(0x67, byte); |
| 160 | |
| 161 | /* set Talert to generate ACPI event */ |
| 162 | byte = pm_ioread(0x3c); |
| 163 | byte &= 0xf3; |
| 164 | pm_iowrite(0x3c, byte); |
| 165 | |
| 166 | /* THERMTRIP pin */ |
| 167 | /* byte = pm_ioread(0x68); |
| 168 | * byte |= 1 << 3; |
| 169 | * pm_iowrite(0x68, byte); |
| 170 | * |
| 171 | * byte = pm_ioread(0x55); |
| 172 | * byte |= 1 << 0; |
| 173 | * pm_iowrite(0x55, byte); |
| 174 | * |
| 175 | * byte = pm_ioread(0x67); |
| 176 | * byte &= ~( 1 << 6); |
| 177 | * pm_iowrite(0x67, byte); |
| 178 | */ |
| 179 | } |
| 180 | |
| 181 | /************************************************* |
| 182 | * enable the dedicated function in dbm690t board. |
| 183 | * This function called early than rs690_enable. |
| 184 | *************************************************/ |
Stefan Reinauer | 523ebd9 | 2010-04-14 18:59:42 +0000 | [diff] [blame] | 185 | static void kt690_enable(device_t dev) |
Stefan Reinauer | c270e89 | 2009-10-13 16:47:57 +0000 | [diff] [blame] | 186 | { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 187 | printk(BIOS_INFO, "Mainboard KT690 Enable. dev=0x%p\n", dev); |
Stefan Reinauer | c270e89 | 2009-10-13 16:47:57 +0000 | [diff] [blame] | 188 | |
Kyösti Mälkki | ba589e3 | 2012-07-11 08:03:13 +0300 | [diff] [blame] | 189 | setup_uma_memory(); |
Stefan Reinauer | c270e89 | 2009-10-13 16:47:57 +0000 | [diff] [blame] | 190 | |
| 191 | enable_onboard_nic(); |
| 192 | get_ide_dma66(); |
| 193 | set_thermal_config(); |
| 194 | } |
| 195 | |
| 196 | int add_mainboard_resources(struct lb_memory *mem) |
| 197 | { |
Stefan Reinauer | 523ebd9 | 2010-04-14 18:59:42 +0000 | [diff] [blame] | 198 | return 0; |
Stefan Reinauer | c270e89 | 2009-10-13 16:47:57 +0000 | [diff] [blame] | 199 | } |
| 200 | |
| 201 | struct chip_operations mainboard_ops = { |
| 202 | CHIP_NAME("Kontron KT690/mITX Mainboard") |
| 203 | .enable_dev = kt690_enable, |
| 204 | }; |