Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2011 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | #include <console/console.h> |
| 21 | #include <device/device.h> |
| 22 | #include <device/pci.h> |
| 23 | #include <arch/io.h> |
| 24 | #include <boot/tables.h> |
| 25 | #include <cpu/x86/msr.h> |
| 26 | #include <cpu/amd/mtrr.h> |
| 27 | #include <device/pci_def.h> |
| 28 | //#include <southbridge/amd/sb800/sb800.h> |
Kerry Sheh | 19329c9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 29 | #include "SBPLATFORM.h" /* Platfrom Specific Definitions */ |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 30 | #include "chip.h" |
| 31 | |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 32 | void set_pcie_reset(void); |
| 33 | void set_pcie_dereset(void); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 34 | |
| 35 | /** |
| 36 | * TODO |
| 37 | * SB CIMx callback |
| 38 | */ |
| 39 | void set_pcie_reset(void) |
| 40 | { |
| 41 | } |
| 42 | |
| 43 | /** |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 44 | * mainboard specific SB CIMx callback |
| 45 | */ |
| 46 | void set_pcie_dereset(void) |
| 47 | { |
Kerry Sheh | 19329c9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 48 | /** |
| 49 | * GPIO32 Pcie Device DeAssert for APU |
| 50 | * GPIO25 Pcie LAN, APU GPP2 |
| 51 | * GPIO02 MINIPCIE SLOT1, APU GPP3 |
| 52 | * GPIO50 Pcie Device DeAssert for Hudson Southbridge |
| 53 | * GPIO05 Express Card, SB GPP0 |
| 54 | * GPIO26 NEC USB3.0GPPUSB, SB GPP1 |
| 55 | * GPIO00 MINIPCIE SLOT2, SB GPP2 |
| 56 | * GPIO05 Pcie X1 Slot, SB GPP3 |
| 57 | */ |
| 58 | |
| 59 | /* Multi-function pins switch to GPIO0-35, these pins are shared with |
| 60 | * PCI pins, make sure Husson PCI device is disabled. |
| 61 | */ |
| 62 | RWMEM(ACPI_MMIO_BASE + PMIO_BASE + SB_PMIOA_REGEA, AccWidthUint8, ~BIT0, 1); |
| 63 | |
| 64 | /* select IOMux to function1/2, corresponds to GPIO */ |
| 65 | RWMEM(ACPI_MMIO_BASE + IOMUX_BASE + SB_GPIO_REG32, AccWidthUint8, ~(BIT0 | BIT1), 1); |
| 66 | RWMEM(ACPI_MMIO_BASE + IOMUX_BASE + SB_GPIO_REG50, AccWidthUint8, ~(BIT0 | BIT1), 2); |
| 67 | |
| 68 | |
| 69 | /* output low */ |
| 70 | RWMEM(ACPI_MMIO_BASE + GPIO_BASE + SB_GPIO_REG32, AccWidthUint8, ~(0xFF), 0x48); |
| 71 | RWMEM(ACPI_MMIO_BASE + GPIO_BASE + SB_GPIO_REG50, AccWidthUint8, ~(0xFF), 0x48); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 72 | } |
| 73 | |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 74 | |
| 75 | /************************************************* |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 76 | * enable the dedicated function in INAGUA board. |
| 77 | *************************************************/ |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 78 | static void inagua_enable(device_t dev) |
| 79 | { |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 80 | printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); |
| 81 | |
Kyösti Mälkki | 55fff930 | 2012-07-11 08:02:39 +0300 | [diff] [blame] | 82 | setup_uma_memory(); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 83 | |
Kerry Sheh | 19329c9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 84 | /* Inagua mainboard specific setting */ |
| 85 | set_pcie_dereset(); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 86 | } |
| 87 | |
| 88 | int add_mainboard_resources(struct lb_memory *mem) |
| 89 | { |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 90 | return 0; |
| 91 | } |
| 92 | struct chip_operations mainboard_ops = { |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 93 | CHIP_NAME(CONFIG_MAINBOARD_VENDOR " " CONFIG_MAINBOARD_PART_NUMBER " Mainboard") |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 94 | .enable_dev = inagua_enable, |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 95 | }; |