blob: 0d4015b321501d1546f7ca9cab317b33496ca9c8 [file] [log] [blame]
Kerry Sheh6d6d18e2012-02-07 20:32:34 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2012 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include <console/console.h>
21#include <device/device.h>
22#include <device/pci.h>
23#include <arch/io.h>
24#include <boot/tables.h>
25#include <cpu/x86/msr.h>
26#include <cpu/amd/mtrr.h>
27#include <device/pci_def.h>
28#include <NbPlatform.h>
29#include "chip.h"
30
Kerry Sheh6d6d18e2012-02-07 20:32:34 +080031//#define SMBUS_IO_BASE 0x6000
32
33void set_pcie_reset(void *nbconfig);
34void set_pcie_dereset(void *nbconfig);
35
36/**
37 * TODO
38 * SB CIMx callback
39 */
40void set_pcie_reset(void *nbconfig)
41{
42}
43
44/**
45 * Mainboard specific RD890 CIMx callback
46 * Release Resets to PCIe Links
47 * SR5690 PCIE_RESET_GPIO1,2,3,4 to reset pcie
48 */
49void set_pcie_dereset(void *nbconfig)
50{
51 //u32 nb_dev = MAKE_SBDFO(0, 0x0, 0x0, 0x0, 0x0);
52 u32 i;
53 u32 val;
54 u32 nb_addr;
55
56 val = 0x00000007UL;
57 AMD_NB_CONFIG_BLOCK *pConfig = (AMD_NB_CONFIG_BLOCK*)nbconfig;
58 for (i = 0; i < MAX_NB_COUNT; i ++) {
59 nb_addr = pConfig->Northbridges[i].NbPciAddress.AddressValue | NB_HTIU_INDEX;
60 LibNbPciIndexRMW(nb_addr,
61 NB_HTIU_REGA8,
62 AccessS3SaveWidth32,
63 ~val,
64 val,
65 &(pConfig->Northbridges[i]));
66 }
67}
68
Kerry Sheh6d6d18e2012-02-07 20:32:34 +080069
70/*************************************************
71 * enable the dedicated function in dinar board.
72 *************************************************/
73static void dinar_enable(device_t dev)
74{
75 printk(BIOS_INFO, "Mainboard Dinar Enable. dev=0x%p\n", dev);
Kyösti Mälkki03548aa2012-07-11 08:01:35 +030076 setup_uma_memory();
Kerry Sheh6d6d18e2012-02-07 20:32:34 +080077}
78
79int add_mainboard_resources(struct lb_memory *mem)
80{
Kerry Sheh6d6d18e2012-02-07 20:32:34 +080081 return 0;
82}
83struct chip_operations mainboard_ops = {
84 CHIP_NAME("AMD DINAR Mainboard")
85 .enable_dev = dinar_enable,
86};