Zheng Bao | 8210e89 | 2011-01-20 05:29:37 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2010 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | #include <console/console.h> |
| 21 | #include <device/device.h> |
| 22 | #include <device/pci.h> |
| 23 | #include <arch/io.h> |
| 24 | #include <boot/tables.h> |
| 25 | #include <cpu/x86/msr.h> |
| 26 | #include <cpu/amd/mtrr.h> |
| 27 | #include <device/pci_def.h> |
| 28 | #include <southbridge/amd/sb800/sb800.h> |
| 29 | #include "chip.h" |
| 30 | |
Zheng Bao | 8210e89 | 2011-01-20 05:29:37 +0000 | [diff] [blame] | 31 | |
| 32 | u8 is_dev3_present(void); |
| 33 | void set_pcie_dereset(void); |
| 34 | void set_pcie_reset(void); |
| 35 | void enable_int_gfx(void); |
| 36 | |
| 37 | /* GPIO6. */ |
| 38 | void enable_int_gfx(void) |
| 39 | { |
| 40 | u8 byte; |
| 41 | |
| 42 | volatile u8 *gpio_reg; |
| 43 | |
| 44 | pm_iowrite(0xEA, 0x01); /* diable the PCIB */ |
| 45 | /* Disable Gec */ |
| 46 | byte = pm_ioread(0xF6); |
| 47 | byte |= 1; |
| 48 | pm_iowrite(0xF6, byte); |
| 49 | /* make sure the fed80000 is accessible */ |
| 50 | byte = pm_ioread(0x24); |
| 51 | byte |= 1; |
| 52 | pm_iowrite(0x24, byte); |
| 53 | |
| 54 | gpio_reg = (volatile u8 *)0xFED80000 + 0xD00; /* IoMux Register */ |
| 55 | |
| 56 | *(gpio_reg + 0x6) = 0x1; /* Int_vga_en */ |
| 57 | *(gpio_reg + 170) = 0x1; /* gpio_gate */ |
| 58 | |
| 59 | gpio_reg = (volatile u8 *)0xFED80000 + 0x100; /* GPIO Registers */ |
| 60 | |
| 61 | *(gpio_reg + 0x6) = 0x8; |
| 62 | *(gpio_reg + 170) = 0x0; |
| 63 | } |
| 64 | |
| 65 | /* |
| 66 | * Bimini uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to |
| 67 | * pull it up before training the slot. |
| 68 | ***/ |
| 69 | void set_pcie_dereset(void) |
| 70 | { |
| 71 | /* GPIO 50h reset PCIe slot */ |
| 72 | /* |
| 73 | u8 *addr = (u8 *)(0xFED80000 + 0x100 + 0x50); |
| 74 | u8 byte = ~(1 << 5); |
| 75 | byte |= ~(1 << 6); |
| 76 | *addr = byte; |
| 77 | */ |
| 78 | } |
| 79 | |
| 80 | void set_pcie_reset(void) |
| 81 | { |
| 82 | /* GPIO 50h reset PCIe slot */ |
| 83 | /* |
| 84 | u8 *addr = (u8 *)(0xFED80000 + 0x100 + 0x50); |
| 85 | u8 byte = ~((1 << 5) | (1 << 6)); |
| 86 | *addr = byte; |
| 87 | */ |
| 88 | } |
| 89 | |
| 90 | u8 is_dev3_present(void) |
| 91 | { |
| 92 | return 0; |
| 93 | } |
| 94 | |
| 95 | #if 0 /* not tested yet. */ |
| 96 | /******************************************************** |
| 97 | * bimini uses SB800 GPIO9 to detect IDE_DMA66. |
| 98 | * IDE_DMA66 is routed to GPIO 9. So we read Gpio 9 to |
| 99 | * get the cable type, 40 pin or 80 pin? |
| 100 | ********************************************************/ |
| 101 | static void get_ide_dma66(void) |
| 102 | { |
| 103 | u8 byte; |
| 104 | /*u32 sm_dev, ide_dev; */ |
| 105 | device_t sm_dev, ide_dev; |
| 106 | |
| 107 | sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); |
| 108 | |
| 109 | byte = pci_read_config8(sm_dev, 0xA9); |
| 110 | byte |= (1 << 5); /* Set Gpio9 as input */ |
| 111 | pci_write_config8(sm_dev, 0xA9, byte); |
| 112 | |
| 113 | ide_dev = dev_find_slot(0, PCI_DEVFN(0x14, 1)); |
| 114 | byte = pci_read_config8(ide_dev, 0x56); |
| 115 | byte &= ~(7 << 0); |
| 116 | if ((1 << 5) & pci_read_config8(sm_dev, 0xAA)) |
| 117 | byte |= 2 << 0; /* mode 2 */ |
| 118 | else |
| 119 | byte |= 5 << 0; /* mode 5 */ |
| 120 | pci_write_config8(ide_dev, 0x56, byte); |
| 121 | } |
| 122 | #endif /* get_ide_dma66() */ |
| 123 | |
| 124 | /************************************************* |
| 125 | * enable the dedicated function in bimini board. |
| 126 | * This function called early than rs780_enable. |
| 127 | *************************************************/ |
| 128 | static void bimini_enable(device_t dev) |
| 129 | { |
| 130 | /* Leave it for furture use. */ |
| 131 | /* struct mainboard_config *mainboard = |
| 132 | (struct mainboard_config *)dev->chip_info; */ |
| 133 | |
| 134 | printk(BIOS_INFO, "Mainboard BIMINI Enable. dev=0x%p\n", dev); |
| 135 | |
Kyösti Mälkki | 231f261 | 2012-07-11 08:02:57 +0300 | [diff] [blame] | 136 | setup_uma_memory(); |
Zheng Bao | 8210e89 | 2011-01-20 05:29:37 +0000 | [diff] [blame] | 137 | |
| 138 | set_pcie_dereset(); |
| 139 | enable_int_gfx(); |
| 140 | /* get_ide_dma66(); */ |
| 141 | } |
| 142 | |
| 143 | int add_mainboard_resources(struct lb_memory *mem) |
| 144 | { |
Zheng Bao | 8210e89 | 2011-01-20 05:29:37 +0000 | [diff] [blame] | 145 | return 0; |
| 146 | } |
| 147 | |
| 148 | struct chip_operations mainboard_ops = { |
| 149 | CHIP_NAME("AMD Bimini Mainboard") |
| 150 | .enable_dev = bimini_enable, |
| 151 | }; |