blob: ae7f72a95f4ebbb785a2dd328c836884b8c21b4f [file] [log] [blame]
Stefan Reinauer6651da32012-04-27 23:16:30 +02001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2009 coresystems GmbH
5 * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <types.h>
22#include <string.h>
23#include <device/device.h>
24#include <device/device.h>
25#include <device/pci_def.h>
26#include <device/pci_ops.h>
27#include <console/console.h>
28#if defined(CONFIG_PCI_OPTION_ROM_RUN_YABEL) && CONFIG_PCI_OPTION_ROM_RUN_YABEL
29#include <x86emu/x86emu.h>
30#endif
31#include <pc80/mc146818rtc.h>
32#include <arch/acpi.h>
33#include <arch/io.h>
34#include <arch/interrupt.h>
35#include <arch/coreboot_tables.h>
36#include "hda_verb.h"
Stefan Reinauer6651da32012-04-27 23:16:30 +020037#include <southbridge/intel/bd82x6x/pch.h>
38
39void mainboard_suspend_resume(void)
40{
41 /* Call SMM finalize() handlers before resume */
42 outb(0xcb, 0xb2);
43}
44
Stefan Reinauer6651da32012-04-27 23:16:30 +020045#if defined(CONFIG_PCI_OPTION_ROM_RUN_REALMODE) && CONFIG_PCI_OPTION_ROM_RUN_REALMODE
46static int int15_handler(struct eregs *regs)
47{
Patrick Georgi503af722012-11-22 10:48:18 +010048 int res=0;
Stefan Reinauer6651da32012-04-27 23:16:30 +020049
50 printk(BIOS_DEBUG, "%s: INT15 function %04x!\n",
51 __func__, regs->eax & 0xffff);
52
53 switch(regs->eax & 0xffff) {
54 case 0x5f34:
55 /*
56 * Set Panel Fitting Hook:
57 * bit 2 = Graphics Stretching
58 * bit 1 = Text Stretching
59 * bit 0 = Centering (do not set with bit1 or bit2)
60 * 0 = video bios default
61 */
62 regs->eax &= 0xffff0000;
63 regs->eax |= 0x005f;
64 regs->ecx &= 0xffffff00;
65 regs->ecx |= 0x01;
Patrick Georgi503af722012-11-22 10:48:18 +010066 res = 1;
Stefan Reinauer6651da32012-04-27 23:16:30 +020067 break;
68 case 0x5f35:
69 /*
70 * Boot Display Device Hook:
71 * bit 0 = CRT
72 * bit 1 = TV (eDP) *
73 * bit 2 = EFP *
74 * bit 3 = LFP
75 * bit 4 = CRT2
76 * bit 5 = TV2 (eDP) *
77 * bit 6 = EFP2 *
78 * bit 7 = LFP2
79 */
80 regs->eax &= 0xffff0000;
81 regs->eax |= 0x005f;
82 regs->ecx &= 0xffff0000;
83 regs->ecx |= 0x0000;
Patrick Georgi503af722012-11-22 10:48:18 +010084 res = 1;
Stefan Reinauer6651da32012-04-27 23:16:30 +020085 break;
86 case 0x5f51:
87 /*
88 * Hook to select active LFP configuration:
89 * 00h = No LVDS, VBIOS does not enable LVDS
90 * 01h = Int-LVDS, LFP driven by integrated LVDS decoder
91 * 02h = SVDO-LVDS, LFP driven by SVDO decoder
92 * 03h = eDP, LFP Driven by Int-DisplayPort encoder
93 */
94 regs->eax &= 0xffff0000;
95 regs->eax |= 0x005f;
96 regs->ecx &= 0xffff0000;
97 regs->ecx |= 0x0003;
Patrick Georgi503af722012-11-22 10:48:18 +010098 res = 1;
Stefan Reinauer6651da32012-04-27 23:16:30 +020099 break;
100 case 0x5f70:
101 switch ((regs->ecx >> 8) & 0xff) {
102 case 0:
103 /* Get Mux */
104 regs->eax &= 0xffff0000;
105 regs->eax |= 0x005f;
106 regs->ecx &= 0xffff0000;
107 regs->ecx |= 0x0000;
Patrick Georgi503af722012-11-22 10:48:18 +0100108 res = 1;
Stefan Reinauer6651da32012-04-27 23:16:30 +0200109 break;
110 case 1:
111 /* Set Mux */
112 regs->eax &= 0xffff0000;
113 regs->eax |= 0x005f;
114 regs->ecx &= 0xffff0000;
115 regs->ecx |= 0x0000;
Patrick Georgi503af722012-11-22 10:48:18 +0100116 res = 1;
Stefan Reinauer6651da32012-04-27 23:16:30 +0200117 break;
118 case 2:
119 /* Get SG/Non-SG mode */
120 regs->eax &= 0xffff0000;
121 regs->eax |= 0x005f;
122 regs->ecx &= 0xffff0000;
123 regs->ecx |= 0x0000;
Patrick Georgi503af722012-11-22 10:48:18 +0100124 res = 1;
Stefan Reinauer6651da32012-04-27 23:16:30 +0200125 break;
126 default:
Patrick Georgi503af722012-11-22 10:48:18 +0100127 /* FIXME: Interrupt was not handled, but return success? */
Stefan Reinauer6651da32012-04-27 23:16:30 +0200128 printk(BIOS_DEBUG, "Unknown INT15 5f70 function: 0x%02x\n",
129 ((regs->ecx >> 8) & 0xff));
Patrick Georgi503af722012-11-22 10:48:18 +0100130 return 1;
Stefan Reinauer6651da32012-04-27 23:16:30 +0200131 }
132 break;
133
134 default:
135 printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n",
136 regs->eax & 0xffff);
137 break;
138 }
139 return res;
140}
141#endif
142
143#if defined(CONFIG_PCI_OPTION_ROM_RUN_YABEL) && CONFIG_PCI_OPTION_ROM_RUN_YABEL
144static int int15_handler(void)
145{
146 printk(BIOS_DEBUG, "%s: AX=%04x BX=%04x CX=%04x DX=%04x\n",
147 __func__, M.x86.R_AX, M.x86.R_BX, M.x86.R_CX, M.x86.R_DX);
148
149 switch (M.x86.R_AX) {
150 case 0x5f34:
151 /*
152 * Set Panel Fitting Hook:
153 * bit 2 = Graphics Stretching
154 * bit 1 = Text Stretching
155 * bit 0 = Centering (do not set with bit1 or bit2)
156 */
157 M.x86.R_AX = 0x005f;
158 M.x86.R_CX = 0x0001;
159 break;
160 case 0x5f35:
161 /*
162 * Boot Display Device Hook:
163 * bit 0 = CRT
164 * bit 1 = TV (eDP) *
165 * bit 2 = EFP *
166 * bit 3 = LFP
167 * bit 4 = CRT2
168 * bit 5 = TV2 (eDP) *
169 * bit 6 = EFP2 *
170 * bit 7 = LFP2
171 */
172 M.x86.R_AX = 0x005f;
173 M.x86.R_CX = 0x0000;
174 break;
175 case 0x5f51:
176 /*
177 * Hook to select active LFP configuration:
178 * 00h = No LVDS, VBIOS does not enable LVDS
179 * 01h = Int-LVDS, LFP driven by integrated LVDS decoder
180 * 02h = SVDO-LVDS, LFP driven by SVDO decoder
181 * 03h = eDP, LFP Driven by Int-DisplayPort encoder
182 */
183 M.x86.R_AX = 0x005f;
184 M.x86.R_CX = 3;
185 break;
186 case 0x5f70:
187 /* Unknown */
188 M.x86.R_AX = 0x005f;
189 M.x86.R_CX = 0;
190 break;
191 default:
192 /* Interrupt was not handled */
193 printk(BIOS_DEBUG, "Unknown INT15 function: 0x%04x\n",
194 M.x86.R_AX);
195 return 0;
196 }
197
198 /* Interrupt handled */
199 return 1;
200}
201#endif
202
Stefan Reinauer6651da32012-04-27 23:16:30 +0200203/* Audio Setup */
204
205extern const u32 * cim_verb_data;
206extern u32 cim_verb_data_size;
207
208static void verb_setup(void)
209{
210 cim_verb_data = mainboard_cim_verb_data;
211 cim_verb_data_size = sizeof(mainboard_cim_verb_data);
212}
213
214// mainboard_enable is executed as first thing after
215// enumerate_buses().
216
217static void mainboard_enable(device_t dev)
218{
219#if CONFIG_PCI_OPTION_ROM_RUN_YABEL || CONFIG_PCI_OPTION_ROM_RUN_REALMODE
220 /* Install custom int15 handler for VGA OPROM */
Patrick Georgi89bbcf42012-09-23 18:41:03 +0200221 mainboard_interrupt_handlers(0x15, &int15_handler);
Stefan Reinauer6651da32012-04-27 23:16:30 +0200222#endif
223 verb_setup();
224}
225
226struct chip_operations mainboard_ops = {
Stefan Reinauer6651da32012-04-27 23:16:30 +0200227 .enable_dev = mainboard_enable,
228};
229