Jakub Czapiga | e0af9fc | 2020-10-09 16:02:46 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | #include <stdlib.h> |
| 4 | #include <tests/test.h> |
| 5 | #include <edid.h> |
| 6 | #include <assert.h> |
| 7 | #include <string.h> |
| 8 | #include <lib/edid-test.h> |
| 9 | |
| 10 | struct test_state { |
| 11 | int data_size; |
| 12 | void *data; |
| 13 | }; |
| 14 | |
| 15 | static uint8_t get_raw_edid_checksum(const unsigned char *x) |
| 16 | { |
| 17 | unsigned char sum = 0; |
| 18 | int i; |
| 19 | for (i = 0; i < 127; ++i) |
| 20 | sum += x[i]; |
| 21 | |
| 22 | return 256 - sum; |
| 23 | } |
| 24 | |
| 25 | static void edid_raw_calc_checksum(struct edid_raw *raw) |
| 26 | { |
| 27 | raw->checksum = get_raw_edid_checksum((const unsigned char *)raw); |
| 28 | } |
| 29 | |
| 30 | static void test_decode_edid_no_edid(void **state) |
| 31 | { |
| 32 | assert_int_equal(EDID_ABSENT, decode_edid(NULL, 0, NULL)); |
| 33 | } |
| 34 | |
| 35 | static void test_decode_edid_invalid_header(void **state) |
| 36 | { |
| 37 | struct edid_raw raw = { |
| 38 | .header = EDID_HEADER_INVALID_RAW |
| 39 | }; |
| 40 | raw.checksum = get_raw_edid_checksum((const unsigned char *)&raw); |
| 41 | |
| 42 | assert_int_equal(EDID_ABSENT, decode_edid((unsigned char *)&raw, sizeof(raw), NULL)); |
| 43 | } |
| 44 | |
| 45 | /* Frame is modified example of an LCD Desktop IT display |
| 46 | * from VESA E-EDID Standard Release A2. |
| 47 | */ |
| 48 | static int setup_decode_edid_basic_frame(void **state) |
| 49 | { |
| 50 | struct edid_raw raw = { |
| 51 | EDID_RAW_DEFAULT_PARAMS, |
| 52 | .video_input_type = EDID_ANALOG_VSI |
| 53 | | EDID_SIGNAL_LEVEL_0 |
| 54 | | EDID_VIDEO_SETUP_BLANK_EQ_BLACK |
| 55 | | EDID_SEPARATE_SYNC_H_AND_V(1) |
| 56 | | EDID_COMPOSITE_SYNC_H(1) |
| 57 | | EDID_COMPOSITE_SYNC_ON_GREEN(1) |
| 58 | | EDID_SERRATION_VSYNC(1), |
| 59 | .horizontal_size = 43, /* [cm] */ |
| 60 | .vertical_size = 32, /* [cm] */ |
| 61 | .display_gamma = 120, /* 220% */ |
| 62 | .supported_features = EDID_STANDBY_MODE(0) |
| 63 | | EDID_SUSPEND_MODE(0) |
| 64 | | EDID_ACTIVE_OFF(1) |
| 65 | | EDID_COLOR_FORMAT_RGB444 |
| 66 | | EDID_SRGB_SUPPORTED(0) |
| 67 | | EDID_PREFERRED_TIMING_EXTENDED_INFO |
| 68 | | EDID_DISPLAY_FREQUENCY_CONTINUOUS, |
| 69 | .established_supported_timings = { |
| 70 | [0] = EDID_ESTABLISHED_TIMINGS_1_720x400_70Hz |
| 71 | | EDID_ESTABLISHED_TIMINGS_1_720x400_88Hz |
| 72 | | EDID_ESTABLISHED_TIMINGS_1_640x480_60Hz |
| 73 | | EDID_ESTABLISHED_TIMINGS_1_640x480_67Hz |
| 74 | | EDID_ESTABLISHED_TIMINGS_1_640x480_72Hz |
| 75 | | EDID_ESTABLISHED_TIMINGS_1_640x480_75Hz |
| 76 | | EDID_ESTABLISHED_TIMINGS_1_800x600_56Hz |
| 77 | | EDID_ESTABLISHED_TIMINGS_1_800x600_60Hz, |
| 78 | [1] = EDID_ESTABLISHED_TIMINGS_2_800x600_72Hz |
| 79 | | EDID_ESTABLISHED_TIMINGS_2_800x600_75Hz |
| 80 | | EDID_ESTABLISHED_TIMINGS_2_832x624_75Hz |
| 81 | | EDID_ESTABLISHED_TIMINGS_2_1024x768_80HzI |
| 82 | | EDID_ESTABLISHED_TIMINGS_2_1024x768_60Hz |
| 83 | | EDID_ESTABLISHED_TIMINGS_2_1024x768_70Hz |
| 84 | | EDID_ESTABLISHED_TIMINGS_2_1024x768_75Hz |
| 85 | | EDID_ESTABLISHED_TIMINGS_2_1280x1024_75Hz, |
| 86 | }, |
| 87 | .manufacturers_reserved_timing = EDID_MANUFACTURERS_TIMINGS_1152x870_75Hz, |
| 88 | .standard_timings_supported = { |
| 89 | [0] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1600), |
| 90 | [1] = EDID_ASPECT_RATIO_4_3 | EDID_FIELD_REFRESH_RATE(85), |
| 91 | |
| 92 | [2] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1600), |
| 93 | [3] = EDID_ASPECT_RATIO_4_3 | EDID_FIELD_REFRESH_RATE(75), |
| 94 | |
| 95 | [4] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1600), |
| 96 | [5] = EDID_ASPECT_RATIO_4_3 | EDID_FIELD_REFRESH_RATE(70), |
| 97 | |
| 98 | [6] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1600), |
| 99 | [7] = EDID_ASPECT_RATIO_4_3 | EDID_FIELD_REFRESH_RATE(65), |
| 100 | |
| 101 | [8] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1280), |
| 102 | [9] = EDID_ASPECT_RATIO_5_4 | EDID_FIELD_REFRESH_RATE(85), |
| 103 | |
| 104 | [10] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1280), |
| 105 | [11] = EDID_ASPECT_RATIO_5_4 | EDID_FIELD_REFRESH_RATE(60), |
| 106 | |
| 107 | [12] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1024), |
| 108 | [13] = EDID_ASPECT_RATIO_4_3 | EDID_FIELD_REFRESH_RATE(85), |
| 109 | |
| 110 | [14] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(800), |
| 111 | [15] = EDID_ASPECT_RATIO_4_3 | EDID_FIELD_REFRESH_RATE(85), |
| 112 | }, |
| 113 | .descriptor_block_1 = { |
| 114 | [0] = EDID_PIXEL_CLOCK(162000000u) & 0xFF, |
| 115 | [1] = (EDID_PIXEL_CLOCK(162000000u) >> 8) & 0xFF, |
| 116 | |
| 117 | /* |
| 118 | * Horizontal Addressable Video is 1600px |
| 119 | * Horizontal Blanking is 560px |
| 120 | */ |
| 121 | [2] = 0x40, [3] = 0x30, [4] = 0x62, |
| 122 | |
| 123 | /* |
| 124 | * Vertical Addressable Video is 1200 lines |
| 125 | * Vertical Blanking is 50 lines |
| 126 | */ |
| 127 | [5] = 0xB0, [6] = 0x32, [7] = 0x40, |
| 128 | |
| 129 | [8] = 64u, /* Horizontal Front Porch in pixels */ |
| 130 | [9] = 192u, /* Horizontal Pulse Sync Width in pixels */ |
| 131 | [10] = 0x13, /* Vertical Front Porch is 1 line */ |
| 132 | [11] = 0x00, /* Vertical Sync Pulse Width is 3 lines */ |
| 133 | |
| 134 | /* |
| 135 | * Horizontal Addressable Image Size is 427mm |
| 136 | * Vertical Addressable Image Size is 320mm |
| 137 | */ |
| 138 | [12] = 0xAB, [13] = 0x40, [14] = 0x11, |
| 139 | |
| 140 | [15] = 0x00, /* Horizontal border size is 0px*/ |
| 141 | [16] = 0x00, /* Vertical Border Size is 0px */ |
| 142 | |
| 143 | /* |
| 144 | * Timing is Non-Interlaced Video, |
| 145 | * Stereo Video is not supported, |
| 146 | * Digital separate syncs are requires. |
| 147 | * */ |
| 148 | [17] = 0x1E, |
| 149 | }, |
| 150 | .descriptor_block_2 = { |
| 151 | /* Display Range Limits Block Tag */ |
| 152 | [0] = 0, [1] = 0, [2] = 0, [3] = 0xFD, |
| 153 | |
| 154 | [4] = 0, /* Horizontal and Vertical Rate Offsets are zero */ |
| 155 | [5] = 50u, /* Minimum Vertical Freq is 50Hz */ |
| 156 | [6] = 90u, /* Maximum Vertical Freq is 90Hz */ |
| 157 | |
| 158 | [7] = 30u, /* Minimum Horizontal Freq is 30kHz */ |
| 159 | [8] = 110u, /* Maximum Horizontal Freq is 110kHz */ |
| 160 | [9] = 23u, /* Maximum Pixel Clock Freq i 230MHz */ |
| 161 | [10] = 0x4, /* Begin CVT Support Info */ |
| 162 | [11] = 0x11, /* Compatible with CVT Version 1.1 */ |
| 163 | [12] = 0, /* Maimum Pixel Clock Freq remains at 230MHz */ |
| 164 | [13] = 200, /* Maximum Active Pixels per Pile is 1600 */ |
| 165 | [14] = 0x90, /* Supported aspect ratios: 4:3, 5:4 */ |
| 166 | |
| 167 | /* Preferred Aspect Ratio is 4:3, Standard CVT Blanking is supported */ |
| 168 | [15] = 0, |
| 169 | [16] = 0x50, /* H. & V. Stretch are supported and Shrinks are not */ |
| 170 | [17] = 60u, /* Preferred Refresh Rate is 60Hz */ |
| 171 | }, |
| 172 | .descriptor_block_3 = { |
| 173 | /* Established Timings III Block Tag */ |
| 174 | [0] = 0, [1] = 0, [2] = 0, [3] = 0xF7, [4] = 0, |
| 175 | |
| 176 | [5] = 10u, /* VESA DMT Standard Version #10 */ |
| 177 | /* |
| 178 | * 640x350@85Hz, |
| 179 | * 640x400@85Hz, |
| 180 | * 720x400@85Hz, |
| 181 | * 640x480@85Hz, |
| 182 | * 800x600@85Hz, |
| 183 | * 1024x768@85Hz, |
| 184 | * 1152x864@75Hz |
| 185 | */ |
| 186 | [6] = 0x7F, |
| 187 | |
| 188 | /* |
| 189 | * 1280x960@60Hz, |
| 190 | * 1280x960@85Hz, |
| 191 | * 1280x1024@60Hz, |
| 192 | * 1280x1024@85Hz |
| 193 | */ |
| 194 | [7] = 0x0F, |
| 195 | |
| 196 | /* |
| 197 | * 1400x1050@60Hz (Normal Blanking), |
| 198 | * 1400x1050@75Hz are supported. |
| 199 | */ |
| 200 | [8] = 0x03, |
| 201 | |
| 202 | /* |
| 203 | * 1400x1050@85Hz, |
| 204 | * 1600x1200@60Hz, |
| 205 | * 1600x1200@65Hz, |
| 206 | * 1600x1200@70Hz are supported. |
| 207 | */ |
| 208 | [9] = 0x87, |
| 209 | |
| 210 | /* |
| 211 | * 1600x1200@75Hz, |
| 212 | * 1600x1200@85Hz are supported. |
| 213 | */ |
| 214 | [10] = 0xC0, |
| 215 | |
| 216 | /* 1920 timings not supported */ |
| 217 | [11] = 0x0, |
| 218 | |
| 219 | [12 ... 17] = 0, |
| 220 | }, |
| 221 | .descriptor_block_4 = { |
| 222 | /* Display Product Name Block Tag */ |
| 223 | [0] = 0, [1] = 0, [2] = 0, [3] = 0xFC, [4] = 0, |
| 224 | |
| 225 | /* Product name */ |
| 226 | [5] = 'A', |
| 227 | [6] = 'B', |
| 228 | [7] = 'C', |
| 229 | [8] = ' ', |
| 230 | [9] = 'L', |
| 231 | [10] = 'C', |
| 232 | [11] = 'D', |
| 233 | [12] = '2', |
| 234 | [13] = '1', |
| 235 | [14] = '\n', |
| 236 | [15] = ' ', |
| 237 | [16] = ' ', |
| 238 | [17] = ' ', |
| 239 | }, |
| 240 | .extension_flag = 0x0, /* No extensions */ |
| 241 | }; |
| 242 | |
| 243 | edid_raw_calc_checksum(&raw); |
| 244 | |
| 245 | *state = malloc(sizeof(struct test_state)); |
| 246 | |
| 247 | struct test_state ts = { |
| 248 | .data_size = sizeof(struct edid_raw), |
| 249 | .data = malloc(sizeof(struct edid_raw)) |
| 250 | }; |
| 251 | |
| 252 | memcpy(ts.data, &raw, sizeof(raw)); |
| 253 | memcpy(*state, &ts, sizeof(ts)); |
| 254 | |
| 255 | return 0; |
| 256 | } |
| 257 | |
| 258 | /* Test decoding of EDID frame without extensions. |
| 259 | */ |
| 260 | static void test_decode_edid_basic_frame(void **state) |
| 261 | { |
| 262 | struct edid out; |
| 263 | struct test_state *ts = *state; |
| 264 | |
| 265 | /* In real-life situations frames often are not 100% conformant, |
| 266 | * but are at least correct when it comes to key data fields. |
| 267 | */ |
| 268 | assert_int_equal(EDID_CONFORMANT, |
| 269 | decode_edid((unsigned char *)ts->data, ts->data_size, &out)); |
| 270 | |
| 271 | assert_int_equal(32, out.framebuffer_bits_per_pixel); |
| 272 | assert_int_equal(0, out.panel_bits_per_color); |
| 273 | assert_int_equal(0, out.panel_bits_per_pixel); |
| 274 | assert_int_equal(0, out.link_clock); |
| 275 | assert_int_equal(1600, out.x_resolution); |
| 276 | assert_int_equal(1200, out.y_resolution); |
| 277 | assert_int_equal(6400, out.bytes_per_line); |
| 278 | assert_int_equal(0, out.hdmi_monitor_detected); |
| 279 | assert_int_equal(0, strnlen(out.ascii_string, ARRAY_SIZE(out.ascii_string))); |
| 280 | assert_string_equal(out.manufacturer_name, EDID_MANUFACTURER_NAME); |
| 281 | |
| 282 | /* Mode */ |
| 283 | assert_null(out.mode.name); |
| 284 | assert_int_equal(162000, out.mode.pixel_clock); |
| 285 | assert_int_equal(1, out.mode.lvds_dual_channel); |
| 286 | assert_int_equal(0, out.mode.refresh); |
| 287 | assert_int_equal(1600, out.mode.ha); |
| 288 | assert_int_equal(560, out.mode.hbl); |
| 289 | assert_int_equal(64, out.mode.hso); |
| 290 | assert_int_equal(192, out.mode.hspw); |
| 291 | assert_int_equal(0, out.mode.hborder); |
| 292 | assert_int_equal(1200, out.mode.va); |
| 293 | assert_int_equal(50, out.mode.vbl); |
| 294 | assert_int_equal(1, out.mode.vso); |
| 295 | assert_int_equal(0, out.mode.vborder); |
| 296 | assert_int_equal(43, out.mode.phsync); |
| 297 | assert_int_equal(43, out.mode.pvsync); |
| 298 | assert_int_equal(0, out.mode.x_mm); |
| 299 | assert_int_equal(0, out.mode.y_mm); |
| 300 | |
| 301 | assert_int_equal(1, out.mode_is_supported[EDID_MODE_640x480_60Hz]); |
| 302 | assert_int_equal(0, out.mode_is_supported[EDID_MODE_720x480_60Hz]); |
| 303 | assert_int_equal(0, out.mode_is_supported[EDID_MODE_1280x720_60Hz]); |
| 304 | assert_int_equal(0, out.mode_is_supported[EDID_MODE_1920x1080_60Hz]); |
| 305 | } |
| 306 | |
| 307 | /* Frame is modified example of base EDID frame with CEA861 extension |
| 308 | * for DTV Display from VESA E-EDID Standard Release A2. |
| 309 | */ |
| 310 | static int setup_decode_edid_dtv_frame_with_extension(void **state) |
| 311 | { |
| 312 | struct edid_raw raw = { |
| 313 | EDID_RAW_DEFAULT_PARAMS, |
| 314 | .video_input_type = EDID_DIGITAL_VSI |
| 315 | | EDID_INTERFACE_HDMI_A |
| 316 | | EDID_COLOR_BIT_DEPTH_8B, |
| 317 | .horizontal_size = 16, /* Aspect ratio 16:9 in landscape */ |
| 318 | .vertical_size = 0, /* Landscape flag */ |
| 319 | .display_gamma = 120, /* 220% */ |
| 320 | .supported_features = EDID_STANDBY_MODE(0) |
| 321 | | EDID_SUSPEND_MODE(0) |
| 322 | | EDID_ACTIVE_OFF(0) |
| 323 | | EDID_COLOR_FORMAT_RGB444_YCRCB422_YCRCB422 |
| 324 | | EDID_SRGB_SUPPORTED(1) |
| 325 | | EDID_PREFERRED_TIMING_EXTENDED_INFO |
| 326 | | EDID_DISPLAY_FREQUENCY_NON_CONTINUOUS, |
| 327 | |
| 328 | .established_supported_timings = { |
| 329 | [0] = EDID_ESTABLISHED_TIMINGS_1_640x480_60Hz, |
| 330 | [1] = 0, |
| 331 | }, |
| 332 | .manufacturers_reserved_timing = 0, |
| 333 | .standard_timings_supported = { [0 ... 15] = 0, }, |
| 334 | .descriptor_block_1 = { |
| 335 | [0] = EDID_PIXEL_CLOCK(148500000u) & 0xFF, |
| 336 | [1] = (EDID_PIXEL_CLOCK(148500000u) >> 8) & 0xFF, |
| 337 | |
| 338 | /* Horizontal Addressable Video is 1920px |
| 339 | * Horizontal Blanking is 280px |
| 340 | */ |
| 341 | [2] = 0x80, [3] = 0x18, [4] = 0x71, |
| 342 | |
| 343 | /* Vertical Addressable Video is 1080 lines |
| 344 | * Vertical Blanking is 45 lines |
| 345 | */ |
| 346 | [5] = 0x38, [6] = 0x2D, [7] = 0x40, |
| 347 | |
| 348 | [8] = 88u, /* Horizontal Front Porch in pixels */ |
| 349 | [9] = 44u, /* Horizontal Pulse Sync Width in pixels */ |
| 350 | [10] = 4u, /* Vertical Front Porch is 4 lines */ |
| 351 | [11] = 5u, /* Vertical Sync Pulse Width is 5 lines */ |
| 352 | |
| 353 | /* Horizontal Addressable Image Size is 1039mm |
| 354 | * Vertical Addressable Image Size is 584mm |
| 355 | */ |
| 356 | [12] = 0x0F, [13] = 0x48, [14] = 0x42, |
| 357 | |
| 358 | [15] = 0x00, /* Horizontal border size is 0px*/ |
| 359 | [16] = 0x00, /* Vertical Border Size is 0px */ |
| 360 | |
| 361 | /* Timing is Non-Interlaced Video, |
| 362 | * Stereo Video is not supported, |
| 363 | * Digital separate and syncs are requires. |
| 364 | */ |
| 365 | [17] = 0x1E, |
| 366 | }, |
| 367 | .descriptor_block_2 = { |
| 368 | [0] = EDID_PIXEL_CLOCK(74250000u) & 0xFF, |
| 369 | [1] = (EDID_PIXEL_CLOCK(74250000u) >> 8) & 0xFF, |
| 370 | |
| 371 | /* Horizontal Addressable Video is 1920px |
| 372 | * Horizontal Blanking is 280px |
| 373 | */ |
| 374 | [2] = 0x80, [3] = 0x18, [4] = 0x71, |
| 375 | |
| 376 | /* Vertical Addressable Video is 540 lines |
| 377 | * Vertical Blanking is 22 lines |
| 378 | */ |
| 379 | [5] = 0x1C, [6] = 0x16, [7] = 0x20, |
| 380 | |
| 381 | [8] = 88u, /* Horizontal Front Porch in pixels */ |
| 382 | [9] = 44u, /* Horizontal Pulse Sync Width in pixels */ |
| 383 | [10] = 0x25, /* Vertical Front Porch is 2 lines */ |
| 384 | [11] = 0x00, /* Vertical Sync Pulse Width is 5 lines */ |
| 385 | |
| 386 | /* Horizontal Addressable Image Size is 1039mm |
| 387 | * Vertical Addressable Image Size is 584mm |
| 388 | */ |
| 389 | [12] = 0x0F, [13] = 0x48, [14] = 0x42, |
| 390 | |
| 391 | [15] = 0x00, /* Horizontal border size is 0px*/ |
| 392 | [16] = 0x00, /* Vertical Border Size is 0px */ |
| 393 | |
| 394 | /* Timing is Interlaced Video, |
| 395 | * Stereo Video is not supported, |
| 396 | * Digital separate and syncs are requires. |
| 397 | */ |
| 398 | [17] = 0x9E, |
| 399 | }, |
| 400 | .descriptor_block_3 = { |
| 401 | [0] = EDID_PIXEL_CLOCK(74250000u) & 0xFF, |
| 402 | [1] = (EDID_PIXEL_CLOCK(74250000u) >> 8) & 0xFF, |
| 403 | |
| 404 | /* Horizontal Addressable Video is 1280px |
| 405 | * Horizontal Blanking is 370px |
| 406 | */ |
| 407 | [2] = 0x00, [3] = 0x72, [4] = 0x51, |
| 408 | |
| 409 | /* Vertical Addressable Video is 720 lines |
| 410 | * Vertical Blanking is 30 lines |
| 411 | */ |
| 412 | [5] = 0xD0, [6] = 0x1E, [7] = 0x20, |
| 413 | |
| 414 | [8] = 110u, /* Horizontal Front Porch in pixels */ |
| 415 | [9] = 40u, /* Horizontal Pulse Sync Width in pixels */ |
| 416 | [10] = 0x55u, /* Vertical Front Porch is 5 lines */ |
| 417 | [11] = 0x00, /* Vertical Sync Pulse Width is 5 lines */ |
| 418 | |
| 419 | /* Horizontal Addressable Image Size is 1039mm |
| 420 | * Vertical Addressable Image Size is 584mm |
| 421 | */ |
| 422 | [12] = 0x0F, [13] = 0x48, [14] = 0x42, |
| 423 | |
| 424 | [15] = 0x00, /* Horizontal border size is 0px*/ |
| 425 | [16] = 0x00, /* Vertical Border Size is 0px */ |
| 426 | |
| 427 | /* Timing is Non-Interlaced Video, |
| 428 | * Stereo Video is not supported, |
| 429 | * Digital separate syncs are requires. |
| 430 | */ |
| 431 | [17] = 0x1E, |
| 432 | }, |
| 433 | .descriptor_block_4 = { |
| 434 | /* Display Product Name Block Tag */ |
| 435 | [0] = 0, [1] = 0, [2] = 0, [3] = 0xFC, [4] = 0, |
| 436 | |
| 437 | /* Product name */ |
| 438 | [5] = 'A', |
| 439 | [6] = 'B', |
| 440 | [7] = 'C', |
| 441 | [8] = ' ', |
| 442 | [9] = 'L', |
| 443 | [10] = 'C', |
| 444 | [11] = 'D', |
| 445 | [12] = '4', |
| 446 | [13] = '7', |
| 447 | [14] = 'w', |
| 448 | [15] = '\n', |
| 449 | [16] = ' ', |
| 450 | [17] = ' ', |
| 451 | }, |
| 452 | .extension_flag = 0x0, /* No extensions */ |
| 453 | }; |
| 454 | |
| 455 | edid_raw_calc_checksum(&raw); |
| 456 | |
| 457 | unsigned char ext[128] = { |
| 458 | [0] = 0x02, /* CEA 861 Extension Block Tag Code */ |
| 459 | [1] = 0x03, /* CEA 861 Block Version */ |
| 460 | |
| 461 | [2] = 0x18, /* Detail Timing Descriptors start 0x18 bytes from here */ |
| 462 | |
| 463 | /* Underscan is not supported |
| 464 | * Basic Audio is supported |
| 465 | * YCbCr 4:4:4 & YCbCr 4:2:2 are supported |
| 466 | * Number of native formats: 2 |
| 467 | */ |
| 468 | [3] = 0x72, |
| 469 | |
| 470 | /* Video Data Block Tag Code is 2 |
| 471 | * Number of Short Video Descriptor Bytes i 7 |
| 472 | */ |
| 473 | [4] = 0x47, |
| 474 | |
| 475 | /* 1920x1080p 59.94/60 Hz 16 : 9 AR (CEA Format #16) |
| 476 | * is a supported Native Format. */ |
| 477 | [5] = 0x90, |
| 478 | |
| 479 | /* 1920x1080i 59.94/60 Hz 16 : 9 AR (CEA Format #5) |
| 480 | * is a supported Native Format. */ |
| 481 | [6] = 0x85, |
| 482 | |
| 483 | /* 1280x720p 59.94/60 Hz 16 : 9 AR (CEA Format #4) is a supported format. */ |
| 484 | [7] = 0x04, |
| 485 | |
| 486 | /* 720x480p 59.94/60 Hz 16 : 9 AR (CEA Format #3) is a supported format. */ |
| 487 | [8] = 0x03, |
| 488 | |
| 489 | /* 720x480p 59.94/60 Hz 4 : 3 AR (CEA Format #2) is a supported format. */ |
| 490 | [9] = 0x02, |
| 491 | |
| 492 | /* 720x480i 59.94/60 Hz 16 : 9 AR (CEA Format #7) is a supported format. */ |
| 493 | [10] = 0x07, |
| 494 | |
| 495 | /* 720x480i 59.94/60 Hz 4 : 3 AR (CEA Format #6) is a supported format. */ |
| 496 | [11] = 0x06, |
| 497 | |
| 498 | /* Audio Data Block Tag Code is 1. |
| 499 | * Number of Short Audio Descriptor Bytes is 3. |
| 500 | */ |
| 501 | [12] = 0x23, |
| 502 | |
| 503 | /* Audio Format Tag Code is 1 --- LPCM is supported. |
| 504 | * Maximum number of audio channels is 2 |
| 505 | */ |
| 506 | [13] = 0x09, |
| 507 | |
| 508 | /* Supported Sampling Frequencies include: 48kHz; 44.1kHz & 32kHz. */ |
| 509 | [14] = 0x07, |
| 510 | |
| 511 | /* Supported Sampling Bit Rates include: 24 bit; 20 bit & 16 bit. */ |
| 512 | [15] = 0x07, |
| 513 | |
| 514 | /* Speaker Allocation Block Tag Code is 4. |
| 515 | * Number of Speaker Allocation |
| 516 | * Descriptor Bytes is 3. |
| 517 | */ |
| 518 | [16] = 0x83, |
| 519 | |
| 520 | /* Speaker Allocation is Front-Left & Front-Right */ |
| 521 | [17] = 0x01, |
| 522 | |
| 523 | /* Reserved */ |
| 524 | [18 ... 19] = 0, |
| 525 | |
| 526 | /* Vendor Specific Data Block Tag Code is 3. |
| 527 | * Number of Vendor Specific Data Bytes is 5. |
| 528 | */ |
| 529 | [20] = 0x65, |
| 530 | |
| 531 | /* 24bit IEEE registration Identifier is 0x000C03 */ |
| 532 | [21] = 0x03, [22] = 0x0C, [23] = 0x00, |
| 533 | |
| 534 | /* Vendor Specific Data is 0x10000 */ |
| 535 | [24] = 0x01, [25] = 0x00, |
| 536 | |
| 537 | /* Descriptor Block 5 [18 Bytes] */ |
| 538 | |
| 539 | [26] = EDID_PIXEL_CLOCK(27027000u) & 0xFF, |
| 540 | [27] = (EDID_PIXEL_CLOCK(27027000u) >> 8) & 0xFF, |
| 541 | |
| 542 | /* Horizontal Addressable Video is 720px. |
| 543 | * Horizontal Blanking is 138 px. |
| 544 | */ |
| 545 | [28] = 0xD0, [29] = 0x8A, [30] = 0x20, |
| 546 | |
| 547 | /* Vertical Addressable Video is 480 lines. |
| 548 | * Vertical Blanking is 45 lines. |
| 549 | */ |
| 550 | [31] = 0xE0, [32] = 0x2D, [33] = 0x10, |
| 551 | |
| 552 | [34] = 16u, /* Horizontal Front Porch in pixels */ |
| 553 | [35] = 62u, /* Horizontal Sync Pulse Width in pixels */ |
| 554 | [36] = 0x96, /* Vertical Front Porch is 9 lines */ |
| 555 | [37] = 0x00, /* Vertical Sync Pulse Width is 6 lines */ |
| 556 | |
| 557 | /* Displayed Image Aspect Ratio is 16:9 */ |
| 558 | [38] = 16u, [39] = 9u, [40] = 0u, |
| 559 | |
| 560 | /* Horizontal and Vertical Border Size is 0 px */ |
| 561 | [41] = 0u, [42] = 0u, |
| 562 | |
| 563 | /* Timing is Interlaced Video |
| 564 | * Stereo Video is not supported |
| 565 | * Digital Separate Syncs are required |
| 566 | */ |
| 567 | [43] = 0x18, |
| 568 | |
| 569 | /* Descriptor Block 6 [18 Bytes] */ |
| 570 | |
| 571 | [44] = EDID_PIXEL_CLOCK(27027000u) & 0xFF, |
| 572 | [45] = (EDID_PIXEL_CLOCK(27027000u) >> 8) & 0xFF, |
| 573 | |
| 574 | /* Horizontal Addressable Video is 720px. |
| 575 | * Horizontal Blanking is 138 px. |
| 576 | */ |
| 577 | [46] = 0xD0, [47] = 0x8A, [48] = 0x20, |
| 578 | |
| 579 | /* Vertical Addressable Video is 480 lines. |
| 580 | * Vertical Blanking is 45 lines. |
| 581 | */ |
| 582 | [49] = 0xE0, [50] = 0x2D, [51] = 0x10, |
| 583 | |
| 584 | [52] = 16u, /* Horizontal Front Porch in pixels */ |
| 585 | [53] = 62u, /* Horizontal Sync Pulse Width in pixels */ |
| 586 | [54] = 0x96, /* Vertical Front Porch is 9 lines */ |
| 587 | [55] = 0x00, /* Vertical Sync Pulse Width is 6 lines */ |
| 588 | |
| 589 | /* Displayed Image Aspect Ratio is 4:3 */ |
| 590 | [56] = 4u, [57] = 3u, [58] = 0u, |
| 591 | |
| 592 | /* Horizontal and Vertical Border Size is 0 px */ |
| 593 | [59] = 0u, [60] = 0u, |
| 594 | |
| 595 | /* Timing is Interlaced Video |
| 596 | * Stereo Video is not supported |
| 597 | * Digital Separate Syncs are required |
| 598 | */ |
| 599 | [61] = 0x18, |
| 600 | |
| 601 | /* Descriptor Block 7 [18 Bytes] */ |
| 602 | |
| 603 | [62] = EDID_PIXEL_CLOCK(27027000u) & 0xFF, |
| 604 | [63] = (EDID_PIXEL_CLOCK(27027000u) >> 8) & 0xFF, |
| 605 | |
| 606 | /* Horizontal Addressable Video is 1440px. |
| 607 | * Horizontal Blanking is 276 px. |
| 608 | */ |
| 609 | [64] = 0xA0, [65] = 0x14, [66] = 0x51, |
| 610 | |
| 611 | /* Vertical Addressable Video is 240 lines. |
| 612 | * Vertical Blanking is 23 lines. |
| 613 | */ |
| 614 | [67] = 0xF0, [68] = 0x16, [69] = 0x00, |
| 615 | |
| 616 | [70] = 38u, /* Horizontal Front Porch in pixels */ |
| 617 | [71] = 124u, /* Horizontal Sync Pulse Width in pixels */ |
| 618 | [72] = 0x43, /* Vertical Front Porch is 9 lines */ |
| 619 | [73] = 0x00, /* Vertical Sync Pulse Width is 6 lines */ |
| 620 | |
| 621 | /* Displayed Image Aspect Ratio is 16:9 */ |
| 622 | [74] = 16u, [75] = 9u, [76] = 0u, |
| 623 | |
| 624 | /* Horizontal and Vertical Border Size is 0 px */ |
| 625 | [77] = 0u, [78] = 0u, |
| 626 | |
| 627 | /* Timing is Interlaced Video |
| 628 | * Stereo Video is not supported |
| 629 | * Digital Separate Syncs are required |
| 630 | */ |
| 631 | [79] = 0x98, |
| 632 | |
| 633 | /* Descriptor Block 8 [18 Bytes] */ |
| 634 | |
| 635 | [80] = EDID_PIXEL_CLOCK(27027000u) & 0xFF, |
| 636 | [81] = (EDID_PIXEL_CLOCK(27027000u) >> 8) & 0xFF, |
| 637 | |
| 638 | /* Horizontal Addressable Video is 1440px. |
| 639 | * Horizontal Blanking is 276 px. |
| 640 | */ |
| 641 | [82] = 0xA0, [83] = 0x14, [84] = 0x51, |
| 642 | |
| 643 | /* Vertical Addressable Video is 240 lines. |
| 644 | * Vertical Blanking is 23 lines. |
| 645 | */ |
| 646 | [85] = 0xF0, [86] = 0x16, [87] = 0x00, |
| 647 | |
| 648 | [88] = 38u, /* Horizontal Front Porch in pixels */ |
| 649 | [89] = 124u, /* Horizontal Sync Pulse Width in pixels */ |
| 650 | [90] = 0x43, /* Vertical Front Porch is 9 lines */ |
| 651 | [91] = 0x00, /* Vertical Sync Pulse Width is 6 lines */ |
| 652 | |
| 653 | /* Displayed Image Aspect Ratio is 4:3 */ |
| 654 | [92] = 4u, [93] = 3u, [94] = 0u, |
| 655 | |
| 656 | /* Horizontal and Vertical Border Size is 0 px */ |
| 657 | [95] = 0u, [96] = 0u, |
| 658 | |
| 659 | /* Timing is Interlaced Video |
| 660 | * Stereo Video is not supported |
| 661 | * Digital Separate Syncs are required |
| 662 | */ |
| 663 | [97] = 0x98, |
| 664 | |
| 665 | [99 ... 126] = 0 |
| 666 | }; |
| 667 | |
| 668 | ext[127] = get_raw_edid_checksum(ext); |
| 669 | |
| 670 | *state = malloc(sizeof(struct test_state)); |
| 671 | |
| 672 | struct test_state ts = { |
| 673 | .data_size = sizeof(raw) + sizeof(ext), |
| 674 | .data = malloc(sizeof(raw) + sizeof(ext)) |
| 675 | }; |
| 676 | |
| 677 | memcpy(ts.data, &raw, sizeof(raw)); |
| 678 | memcpy(ts.data + sizeof(raw), &ext[0], sizeof(ext)); |
| 679 | |
| 680 | memcpy(*state, &ts, sizeof(ts)); |
| 681 | |
| 682 | return 0; |
| 683 | } |
| 684 | |
| 685 | /* Test decoding of EDID frame with one extension. |
| 686 | */ |
| 687 | static void test_decode_edid_dtv_frame_with_extension(void **state) |
| 688 | { |
| 689 | struct edid out; |
| 690 | struct test_state *ts = *state; |
| 691 | |
| 692 | /* In real-life situations frames often are not 100% conformant, |
| 693 | * but are at least correct when it comes to key data fields. |
| 694 | */ |
| 695 | assert_int_equal(EDID_CONFORMANT, |
| 696 | decode_edid((unsigned char *)ts->data, ts->data_size, &out)); |
| 697 | |
| 698 | assert_int_equal(32, out.framebuffer_bits_per_pixel); |
| 699 | assert_int_equal(8, out.panel_bits_per_color); |
| 700 | assert_int_equal(24, out.panel_bits_per_pixel); |
| 701 | assert_int_equal(0, out.link_clock); |
| 702 | assert_int_equal(1920, out.x_resolution); |
| 703 | assert_int_equal(1080, out.y_resolution); |
| 704 | assert_int_equal(7680, out.bytes_per_line); |
| 705 | assert_int_equal(1, out.hdmi_monitor_detected); |
| 706 | assert_int_equal(0, strnlen(out.ascii_string, ARRAY_SIZE(out.ascii_string))); |
| 707 | assert_string_equal(out.manufacturer_name, EDID_MANUFACTURER_NAME); |
| 708 | |
| 709 | /* Mode */ |
| 710 | assert_null(out.mode.name); |
| 711 | assert_int_equal(148500, out.mode.pixel_clock); |
| 712 | assert_int_equal(1, out.mode.lvds_dual_channel); |
| 713 | assert_int_equal(0, out.mode.refresh); |
| 714 | assert_int_equal(1920, out.mode.ha); |
| 715 | assert_int_equal(280, out.mode.hbl); |
| 716 | assert_int_equal(88, out.mode.hso); |
| 717 | assert_int_equal(44, out.mode.hspw); |
| 718 | assert_int_equal(0, out.mode.hborder); |
| 719 | assert_int_equal(1080, out.mode.va); |
| 720 | assert_int_equal(45, out.mode.vbl); |
| 721 | assert_int_equal(16, out.mode.vso); |
| 722 | assert_int_equal(0, out.mode.vborder); |
| 723 | assert_int_equal(43, out.mode.phsync); |
| 724 | assert_int_equal(43, out.mode.pvsync); |
| 725 | assert_int_equal(0, out.mode.x_mm); |
| 726 | assert_int_equal(0, out.mode.y_mm); |
| 727 | |
| 728 | assert_int_equal(1, out.mode_is_supported[EDID_MODE_640x480_60Hz]); |
| 729 | assert_int_equal(0, out.mode_is_supported[EDID_MODE_720x480_60Hz]); |
| 730 | assert_int_equal(0, out.mode_is_supported[EDID_MODE_1280x720_60Hz]); |
| 731 | assert_int_equal(0, out.mode_is_supported[EDID_MODE_1920x1080_60Hz]); |
| 732 | } |
| 733 | |
| 734 | |
| 735 | /* Test decoding of EDID frame with one extension. Tested frame is modified |
| 736 | * example of base EDID frame with CEA861 extension for IT/DTV Display from |
| 737 | * VESA E-EDID Standard Release A2. |
| 738 | */ |
| 739 | static int setup_decode_edid_it_dtv_frame_with_extension(void **state) |
| 740 | { |
| 741 | struct edid_raw raw = { |
| 742 | EDID_RAW_DEFAULT_PARAMS, |
| 743 | .video_input_type = EDID_DIGITAL_VSI |
| 744 | | EDID_INTERFACE_HDMI_A |
| 745 | | EDID_COLOR_BIT_DEPTH_8B, |
| 746 | .horizontal_size = 121, /* Aspect ratio 16:9 in landscape */ |
| 747 | .vertical_size = 68, /* Landscape flag */ |
| 748 | .display_gamma = 120, /* 220% */ |
| 749 | .supported_features = EDID_STANDBY_MODE(0) |
| 750 | | EDID_SUSPEND_MODE(0) |
| 751 | | EDID_ACTIVE_OFF(0) |
| 752 | | EDID_COLOR_FORMAT_RGB444_YCRCB422_YCRCB422 |
| 753 | | EDID_SRGB_SUPPORTED(1) |
| 754 | | EDID_PREFERRED_TIMING_EXTENDED_INFO |
| 755 | | EDID_DISPLAY_FREQUENCY_NON_CONTINUOUS, |
| 756 | .established_supported_timings = { |
| 757 | [0] = EDID_ESTABLISHED_TIMINGS_1_800x600_60Hz |
| 758 | | EDID_ESTABLISHED_TIMINGS_1_800x600_56Hz |
| 759 | | EDID_ESTABLISHED_TIMINGS_1_640x480_75Hz |
| 760 | | EDID_ESTABLISHED_TIMINGS_1_640x480_72Hz |
| 761 | | EDID_ESTABLISHED_TIMINGS_1_640x480_67Hz |
| 762 | | EDID_ESTABLISHED_TIMINGS_1_640x480_60Hz |
| 763 | | EDID_ESTABLISHED_TIMINGS_1_720x400_88Hz |
| 764 | | EDID_ESTABLISHED_TIMINGS_1_720x400_70Hz, |
| 765 | [1] = EDID_ESTABLISHED_TIMINGS_2_1280x1024_75Hz |
| 766 | | EDID_ESTABLISHED_TIMINGS_2_1024x768_75Hz |
| 767 | | EDID_ESTABLISHED_TIMINGS_2_1024x768_70Hz |
| 768 | | EDID_ESTABLISHED_TIMINGS_2_1024x768_60Hz |
| 769 | | EDID_ESTABLISHED_TIMINGS_2_832x624_75Hz |
| 770 | | EDID_ESTABLISHED_TIMINGS_2_800x600_75Hz |
| 771 | | EDID_ESTABLISHED_TIMINGS_2_800x600_72Hz, |
| 772 | }, |
| 773 | .manufacturers_reserved_timing = EDID_MANUFACTURERS_TIMINGS_1152x870_75Hz, |
| 774 | .standard_timings_supported = { |
| 775 | [0] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1280), |
| 776 | [1] = EDID_ASPECT_RATIO_5_4 | EDID_FIELD_REFRESH_RATE(85), |
| 777 | |
| 778 | [2] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1280), |
| 779 | [3] = EDID_ASPECT_RATIO_5_4 | EDID_FIELD_REFRESH_RATE(60), |
| 780 | |
| 781 | [4] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1280), |
| 782 | [5] = EDID_ASPECT_RATIO_4_3 | EDID_FIELD_REFRESH_RATE(85), |
| 783 | |
| 784 | [6] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1280), |
| 785 | [7] = EDID_ASPECT_RATIO_4_3 | EDID_FIELD_REFRESH_RATE(60), |
| 786 | |
| 787 | [8] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(1024), |
| 788 | [9] = EDID_ASPECT_RATIO_4_3 | EDID_FIELD_REFRESH_RATE(85), |
| 789 | |
| 790 | [10] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(848), |
| 791 | [11] = EDID_ASPECT_RATIO_16_9 | EDID_FIELD_REFRESH_RATE(60), |
| 792 | |
| 793 | [12] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(800), |
| 794 | [13] = EDID_ASPECT_RATIO_4_3 | EDID_FIELD_REFRESH_RATE(60), |
| 795 | |
| 796 | [14] = EDID_HORIZONTAL_ACCESSIBLE_PIXELS(640), |
| 797 | [15] = EDID_ASPECT_RATIO_4_3 | EDID_FIELD_REFRESH_RATE(60), |
| 798 | }, |
| 799 | .descriptor_block_1 = { |
| 800 | [0] = EDID_PIXEL_CLOCK(85500000u) & 0xFF, |
| 801 | [1] = (EDID_PIXEL_CLOCK(85500000u) >> 8) & 0xFF, |
| 802 | |
| 803 | /* Horizontal Addressable Video is 1360px |
| 804 | * Horizontal Blanking is 432px |
| 805 | */ |
| 806 | [2] = 0x50, [3] = 0xB0, [4] = 0x51, |
| 807 | |
| 808 | /* Vertical Addressable Video is 768 lines |
| 809 | * Vertical Blanking is 27 lines |
| 810 | */ |
| 811 | [5] = 0x00, [6] = 0x1B, [7] = 0x30, |
| 812 | |
| 813 | [8] = 64u, /* Horizontal Front Porch in pixels */ |
| 814 | [9] = 112u, /* Horizontal Pulse Sync Width in pixels */ |
| 815 | [10] = 0x36, /* Vertical Front Porch is 3 lines */ |
| 816 | [11] = 0u, /* Vertical Sync Pulse Width is 6 lines */ |
| 817 | |
| 818 | /* Horizontal Addressable Image Size is 1214mm |
| 819 | * Vertical Addressable Image Size is 683mm |
| 820 | */ |
| 821 | [12] = 0xBE, [13] = 0xAB, [14] = 0x42, |
| 822 | |
| 823 | [15] = 0x00, /* Horizontal border size is 0px*/ |
| 824 | [16] = 0x00, /* Vertical Border Size is 0px */ |
| 825 | |
| 826 | /* Timing is Non-Interlaced Video, |
| 827 | * Stereo Video is not supported, |
| 828 | * Digital separate and syncs are requires. |
| 829 | */ |
| 830 | [17] = 0x1E, |
| 831 | }, |
| 832 | .descriptor_block_2 = { |
| 833 | [0] = EDID_PIXEL_CLOCK(74250000u) & 0xFF, |
| 834 | [1] = (EDID_PIXEL_CLOCK(74250000u) >> 8) & 0xFF, |
| 835 | |
| 836 | /* Horizontal Addressable Video is 1280px |
| 837 | * Horizontal Blanking is 370px |
| 838 | */ |
| 839 | [2] = 0x00, [3] = 0x72, [4] = 0x51, |
| 840 | |
| 841 | /* Vertical Addressable Video is 720 lines |
| 842 | * Vertical Blanking is 30 lines |
| 843 | */ |
| 844 | [5] = 0xD0, [6] = 0x1E, [7] = 0x20, |
| 845 | |
| 846 | [8] = 110u, /* Horizontal Front Porch in pixels */ |
| 847 | [9] = 40u, /* Horizontal Pulse Sync Width in pixels */ |
| 848 | [10] = 0x55, /* Vertical Front Porch is 5 lines */ |
| 849 | [11] = 0x00, /* Vertical Sync Pulse Width is 5 lines */ |
| 850 | |
| 851 | /* Horizontal Addressable Image Size is 1214mm |
| 852 | * Vertical Addressable Image Size is 683mm |
| 853 | */ |
| 854 | [12] = 0xBE, [13] = 0xAB, [14] = 0x42, |
| 855 | |
| 856 | [15] = 0x00, /* Horizontal border size is 0px*/ |
| 857 | [16] = 0x00, /* Vertical Border Size is 0px */ |
| 858 | |
| 859 | /* Timing is Non-Interlaced Video, |
| 860 | * Stereo Video is not supported, |
| 861 | * Digital separate and syncs are requires. |
| 862 | */ |
| 863 | [17] = 0x1E, |
| 864 | }, |
| 865 | .descriptor_block_3 = { |
| 866 | /* Established timings III Block Tag */ |
| 867 | [0 ... 2] = 0u, [3] = 0xF7, [4] = 0u, |
| 868 | |
| 869 | /* |
| 870 | * VESA DMT Standard Version #10 |
| 871 | */ |
| 872 | [5] = 10u, |
| 873 | |
| 874 | /* 640x350@85Hz, |
| 875 | * 640x400@85Hz, |
| 876 | * 720x400@85Hz, |
| 877 | * 640x480@85Hz, |
| 878 | * 800x600@85Hz, |
| 879 | * 1024x768@85Hz, |
| 880 | * 1152x864@75Hz are supported. |
| 881 | */ |
| 882 | [6] = 0x7F, |
| 883 | |
| 884 | /* 1280x960@60Hz, |
| 885 | * 1280x960@85Hz, |
| 886 | * 1280x1024@60Hz, |
| 887 | * 1280x1024@85Hz |
| 888 | */ |
| 889 | [7] = 0x0F, |
| 890 | |
| 891 | /* 1400x1050@60Hz (Normal Blanking), |
| 892 | * 1400x1050@75Hz are supported. |
| 893 | */ |
| 894 | [8] = 0x03, |
| 895 | |
| 896 | /* 1400x1050@85Hz, |
| 897 | * 1600x1200@60Hz, |
| 898 | * 1600x1200@65Hz, |
| 899 | * 1600x1200@70Hz are supported. |
| 900 | */ |
| 901 | [9] = 0x87, |
| 902 | |
| 903 | /* 1600x1200@75Hz, |
| 904 | * 1600x1200@85Hz are supported. |
| 905 | */ |
| 906 | [10] = 0xC0, |
| 907 | |
| 908 | /* 1920 PC Timings are not supported. */ |
| 909 | [11] = 0u, |
| 910 | |
| 911 | /* Reserved */ |
| 912 | [12 ... 17] = 0, |
| 913 | }, |
| 914 | .descriptor_block_4 = { |
| 915 | /* Display Product Name Block Tag */ |
| 916 | [0] = 0, [1] = 0, [2] = 0, [3] = 0xFC, [4] = 0, |
| 917 | |
| 918 | /* Product name */ |
| 919 | [5] = 'A', |
| 920 | [6] = 'B', |
| 921 | [7] = 'C', |
| 922 | [8] = ' ', |
| 923 | [9] = 'P', |
| 924 | [10] = 'L', |
| 925 | [11] = 'A', |
| 926 | [12] = '5', |
| 927 | [13] = '5', |
| 928 | [14] = '\n', |
| 929 | [15] = ' ', |
| 930 | [16] = ' ', |
| 931 | [17] = ' ', |
| 932 | }, |
| 933 | .extension_flag = 0x0, /* No extensions */ |
| 934 | }; |
| 935 | |
| 936 | edid_raw_calc_checksum(&raw); |
| 937 | |
| 938 | unsigned char ext[128] = { |
| 939 | [0] = 0x02, /* CEA 861 Extension Block Tag Code */ |
| 940 | [1] = 0x03, /* CEA 861 Block Version */ |
| 941 | [2] = 0x17, /* Detail Timing Descriptors start 0x17 bytesfrom here */ |
| 942 | |
| 943 | /* Underscan is supported |
| 944 | * Basic Audio is supported |
| 945 | * YCbCr 4:4:4 & YCbCr 4:2:2 are supported |
| 946 | * Number of native formats: 0 |
| 947 | */ |
| 948 | [3] = 0xF0, |
| 949 | |
| 950 | /* Video Data Block Tag Code is 2 |
| 951 | * Number of Short Video Descriptor Bytes i 6 |
| 952 | */ |
| 953 | [4] = 0x46, |
| 954 | |
| 955 | /* 1920x1080i 59.94/60 Hz 16 : 9 AR (CEA Format #5) is a supported format. */ |
| 956 | [5] = 0x05, |
| 957 | |
| 958 | /* 1280x720p 59.94/60 Hz 16 : 9 AR (CEA Format #4) is a supported format. */ |
| 959 | [6] = 0x04, |
| 960 | |
| 961 | /* 720x480p 59.94/60 Hz 16 : 9 AR (CEA Format #3) is a supported format. */ |
| 962 | [7] = 0x03, |
| 963 | |
| 964 | /* 720x480p 59.94/60 Hz 4 : 3 AR (CEA Format #2) is a supported format. */ |
| 965 | [8] = 0x02, |
| 966 | |
| 967 | /* 720x480i 59.94/60 Hz 16 : 9 AR (CEA Format #7) is a supported format. */ |
| 968 | [9] = 0x07, |
| 969 | |
| 970 | /* 720x480i 59.94/60 Hz 4 : 3 AR (CEA Format #6) is a supported format. */ |
| 971 | [10] = 0x06, |
| 972 | |
| 973 | /* Audio Data Block Tag Code is 1. |
| 974 | * Number of Short Audio Descriptor Bytes is 3. |
| 975 | */ |
| 976 | [11] = 0x23, |
| 977 | |
| 978 | /* Audio Format Tag Code is 1 --- LPCM is supported. |
| 979 | * Maximum number of audio channels is 2 |
| 980 | */ |
| 981 | [12] = 0x09, |
| 982 | |
| 983 | /* Supported Sampling Frequencies include: 48kHz; 44.1kHz & 32kHz. */ |
| 984 | [13] = 0x07, |
| 985 | |
| 986 | /* Supported Sampling Bit Rates include: 24 bit; 20 bit & 16 bit. */ |
| 987 | [14] = 0x07, |
| 988 | |
| 989 | /* Speaker Allocation Block Tag Code is 4. |
| 990 | * Number of Speaker Allocation |
| 991 | * Descriptor Bytes is 3. |
| 992 | */ |
| 993 | [15] = 0x83, |
| 994 | |
| 995 | /* Speaker Allocation is Front-Left & Front-Right */ |
| 996 | [16] = 0x01, |
| 997 | |
| 998 | /* Reserved */ |
| 999 | [17 ... 18] = 0, |
| 1000 | |
| 1001 | /* Vendor Specific Data Block Tag Code is 3. |
| 1002 | * Number of Vendor Specific Data Bytes is 5. |
| 1003 | */ |
| 1004 | [19] = 0x65, |
| 1005 | |
| 1006 | /* 24bit IEEE registration Identifier is 0x000C03 */ |
| 1007 | [20] = 0x03, [21] = 0x0C, [22] = 0x00, |
| 1008 | |
| 1009 | /* Vendor Specific Data is 0x10000 */ |
| 1010 | [23] = 0x01, [24] = 0x00, |
| 1011 | |
| 1012 | /* Descriptor Block 5 [18 Bytes] */ |
| 1013 | |
| 1014 | [25] = EDID_PIXEL_CLOCK(74250000u) & 0xFF, |
| 1015 | [26] = (EDID_PIXEL_CLOCK(74250000u) >> 8) & 0xFF, |
| 1016 | |
| 1017 | /* Horizontal Addressable Video is 1920px. |
| 1018 | * Horizontal Blanking is 280px. |
| 1019 | */ |
| 1020 | [27] = 0x80, [28] = 0x18, [29] = 0x71, |
| 1021 | |
| 1022 | /* Vertical Addressable Video is 540 lines. |
| 1023 | * Vertical Blanking is 22 lines. |
| 1024 | */ |
| 1025 | [30] = 0x1C, [31] = 0x16, [32] = 0x20, |
| 1026 | |
| 1027 | [33] = 88u, /* Horizontal Front Porch in pixels */ |
| 1028 | [34] = 44u, /* Horizontal Sync Pulse Width in pixels */ |
| 1029 | [35] = 0x25, /* Vertical Front Porch is 2 lines */ |
| 1030 | [36] = 0x00, /* Vertical Sync Pulse Width is 5 lines */ |
| 1031 | |
| 1032 | /* Image size: 1039mm x 584mm */ |
| 1033 | [37] = 0x0F, [38] = 0x48, [39] = 0x42, |
| 1034 | |
| 1035 | /* Horizontal and Vertical Border Size is 0 px */ |
| 1036 | [40] = 0u, [41] = 0u, |
| 1037 | |
| 1038 | /* Timing is Interlaced Video |
| 1039 | * Stereo Video is not supported |
| 1040 | * Digital Separate Syncs are required |
| 1041 | */ |
| 1042 | [42] = 0x9E, |
| 1043 | |
| 1044 | /* Descriptor Block 6 [18 Bytes] */ |
| 1045 | |
| 1046 | [43] = EDID_PIXEL_CLOCK(74250000u) & 0xFF, |
| 1047 | [44] = (EDID_PIXEL_CLOCK(74250000u) >> 8) & 0xFF, |
| 1048 | |
| 1049 | /* Horizontal Addressable Video is 1280px. |
| 1050 | * Horizontal Blanking is 370 px. |
| 1051 | */ |
| 1052 | [45] = 0x00, [46] = 0x72, [47] = 0x51, |
| 1053 | |
| 1054 | /* Vertical Addressable Video is 720 lines. |
| 1055 | * Vertical Blanking is 30 lines. |
| 1056 | */ |
| 1057 | [48] = 0xD0, [49] = 0x1E, [50] = 0x20, |
| 1058 | |
| 1059 | [51] = 110u, /* Horizontal Front Porch in pixels */ |
| 1060 | [52] = 40u, /* Horizontal Sync Pulse Width in pixels */ |
| 1061 | [53] = 0x55, /* Vertical Front Porch is 5 lines */ |
| 1062 | [54] = 0x00, /* Vertical Sync Pulse Width is 5 lines */ |
| 1063 | |
| 1064 | /* Image size: 1039mm x 584mm */ |
| 1065 | [55] = 0x0F, [56] = 0x48, [57] = 0x42, |
| 1066 | |
| 1067 | /* Horizontal and Vertical Border Size is 0 px */ |
| 1068 | [58] = 0u, [59] = 0u, |
| 1069 | |
| 1070 | /* Timing is Non-Interlaced Video |
| 1071 | * Stereo Video is not supported |
| 1072 | * Digital Separate Syncs are required |
| 1073 | */ |
| 1074 | [60] = 0x1E, |
| 1075 | |
| 1076 | /* Descriptor Block 7 [18 Bytes] */ |
| 1077 | |
| 1078 | [61] = EDID_PIXEL_CLOCK(27000000u) & 0xFF, |
| 1079 | [62] = (EDID_PIXEL_CLOCK(27000000u) >> 8) & 0xFF, |
| 1080 | |
| 1081 | /* Horizontal Addressable Video is 1440px. |
| 1082 | * Horizontal Blanking is 276 px. |
| 1083 | */ |
| 1084 | [63] = 0xA0, [64] = 0x14, [65] = 0x51, |
| 1085 | |
| 1086 | /* Vertical Addressable Video is 240 lines. |
| 1087 | * Vertical Blanking is 23 lines. |
| 1088 | */ |
| 1089 | [66] = 0xF0, [67] = 0x16, [68] = 0x00, |
| 1090 | |
| 1091 | [69] = 38u, /* Horizontal Front Porch in pixels */ |
| 1092 | [70] = 124u, /* Horizontal Sync Pulse Width in pixels */ |
| 1093 | [71] = 0x43, /* Vertical Front Porch is 4 lines */ |
| 1094 | [72] = 0x00, /* Vertical Sync Pulse Width is 3 lines */ |
| 1095 | |
| 1096 | /* Image size: 1039mm x 584mm */ |
| 1097 | [73] = 0x0F, [74] = 0x48, [75] = 0x42, |
| 1098 | |
| 1099 | /* Horizontal and Vertical Border Size is 0 px */ |
| 1100 | [76] = 0u, [77] = 0u, |
| 1101 | |
| 1102 | /* Timing is Interlaced Video |
| 1103 | * Stereo Video is not supported |
| 1104 | * Digital Separate Syncs are required |
| 1105 | */ |
| 1106 | [78] = 0x18, |
| 1107 | |
| 1108 | /* Descriptor Block 8 [18 Bytes] */ |
| 1109 | |
| 1110 | [79] = EDID_PIXEL_CLOCK(27027000u) & 0xFF, |
| 1111 | [80] = (EDID_PIXEL_CLOCK(27027000u) >> 8) & 0xFF, |
| 1112 | |
| 1113 | /* Horizontal Addressable Video is 1440px. |
| 1114 | * Horizontal Blanking is 276 px. |
| 1115 | */ |
| 1116 | [81] = 0xA0, [82] = 0x14, [83] = 0x51, |
| 1117 | |
| 1118 | /* Vertical Addressable Video is 240 lines. |
| 1119 | * Vertical Blanking is 23 lines. |
| 1120 | */ |
| 1121 | [84] = 0xF0, [85] = 0x16, [86] = 0x00, |
| 1122 | |
| 1123 | [87] = 38u, /* Horizontal Front Porch in pixels */ |
| 1124 | [88] = 124u, /* Horizontal Sync Pulse Width in pixels */ |
| 1125 | [89] = 0x43, /* Vertical Front Porch is 4 lines */ |
| 1126 | [90] = 0x00, /* Vertical Sync Pulse Width is 3 lines */ |
| 1127 | |
| 1128 | /* Image size: 1039mm x 584mm */ |
| 1129 | [91] = 0x0F, [92] = 0x48, [93] = 0x42, |
| 1130 | |
| 1131 | /* Horizontal and Vertical Border Size is 0 px */ |
| 1132 | [94] = 0u, [95] = 0u, |
| 1133 | |
| 1134 | /* Timing is Interlaced Video |
| 1135 | * Stereo Video is not supported |
| 1136 | * Digital Separate Syncs are required |
| 1137 | */ |
| 1138 | [96] = 0x98, |
| 1139 | |
| 1140 | [97 ... 126] = 0, |
| 1141 | }; |
| 1142 | |
| 1143 | ext[127] = get_raw_edid_checksum(ext); |
| 1144 | |
| 1145 | *state = malloc(sizeof(struct test_state)); |
| 1146 | |
| 1147 | struct test_state ts = { |
| 1148 | .data_size = sizeof(raw) + sizeof(ext), |
| 1149 | .data = malloc(sizeof(raw) + sizeof(ext)) |
| 1150 | }; |
| 1151 | |
| 1152 | memcpy(ts.data, &raw, sizeof(raw)); |
| 1153 | memcpy(ts.data + sizeof(raw), &ext[0], sizeof(ext)); |
| 1154 | |
| 1155 | memcpy(*state, &ts, sizeof(ts)); |
| 1156 | |
| 1157 | return 0; |
| 1158 | } |
| 1159 | |
| 1160 | static void test_decode_edid_it_dtv_frame_with_extension(void **state) |
| 1161 | { |
| 1162 | struct edid out; |
| 1163 | struct test_state *ts = *state; |
| 1164 | |
| 1165 | /* In real-life situations frames often are not 100% conformant, |
| 1166 | * but are at least correct when it comes to key data fields. |
| 1167 | */ |
| 1168 | assert_int_equal(EDID_CONFORMANT, |
| 1169 | decode_edid((unsigned char *)ts->data, ts->data_size, &out)); |
| 1170 | |
| 1171 | assert_int_equal(32, out.framebuffer_bits_per_pixel); |
| 1172 | assert_int_equal(8, out.panel_bits_per_color); |
| 1173 | assert_int_equal(24, out.panel_bits_per_pixel); |
| 1174 | assert_int_equal(0, out.link_clock); |
| 1175 | assert_int_equal(1360, out.x_resolution); |
| 1176 | assert_int_equal(768, out.y_resolution); |
| 1177 | assert_int_equal(5440, out.bytes_per_line); |
| 1178 | assert_int_equal(1, out.hdmi_monitor_detected); |
| 1179 | assert_int_equal(0, strnlen(out.ascii_string, ARRAY_SIZE(out.ascii_string))); |
| 1180 | assert_string_equal(out.manufacturer_name, EDID_MANUFACTURER_NAME); |
| 1181 | |
| 1182 | /* Mode */ |
| 1183 | assert_null(out.mode.name); |
| 1184 | assert_int_equal(85500, out.mode.pixel_clock); |
| 1185 | assert_int_equal(0, out.mode.lvds_dual_channel); |
| 1186 | assert_int_equal(0, out.mode.refresh); |
| 1187 | assert_int_equal(1360, out.mode.ha); |
| 1188 | assert_int_equal(432, out.mode.hbl); |
| 1189 | assert_int_equal(64, out.mode.hso); |
| 1190 | assert_int_equal(112, out.mode.hspw); |
| 1191 | assert_int_equal(0, out.mode.hborder); |
| 1192 | assert_int_equal(768, out.mode.va); |
| 1193 | assert_int_equal(27, out.mode.vbl); |
| 1194 | assert_int_equal(3, out.mode.vso); |
| 1195 | assert_int_equal(0, out.mode.vborder); |
| 1196 | assert_int_equal(43, out.mode.phsync); |
| 1197 | assert_int_equal(43, out.mode.pvsync); |
| 1198 | assert_int_equal(0, out.mode.x_mm); |
| 1199 | assert_int_equal(0, out.mode.y_mm); |
| 1200 | |
| 1201 | assert_int_equal(1, out.mode_is_supported[EDID_MODE_640x480_60Hz]); |
| 1202 | assert_int_equal(0, out.mode_is_supported[EDID_MODE_720x480_60Hz]); |
| 1203 | assert_int_equal(0, out.mode_is_supported[EDID_MODE_1280x720_60Hz]); |
| 1204 | assert_int_equal(0, out.mode_is_supported[EDID_MODE_1920x1080_60Hz]); |
| 1205 | } |
| 1206 | |
| 1207 | static int teardown_edid_test(void **state) |
| 1208 | { |
| 1209 | struct test_state *ts; |
| 1210 | |
| 1211 | if (*state == NULL) |
| 1212 | return 0; |
| 1213 | |
| 1214 | ts = (struct test_state *)*state; |
| 1215 | |
| 1216 | free(ts->data); |
| 1217 | free(ts); |
| 1218 | |
| 1219 | return 0; |
| 1220 | } |
| 1221 | |
| 1222 | static void test_edid_set_framebuffer_bits_per_pixel(void **state) |
| 1223 | { |
| 1224 | struct edid out; |
| 1225 | struct test_state *ts = *state; |
| 1226 | |
| 1227 | decode_edid((unsigned char *)ts->data, ts->data_size, &out); |
| 1228 | |
| 1229 | edid_set_framebuffer_bits_per_pixel(&out, 16, 2); |
| 1230 | |
| 1231 | assert_int_equal(16, out.framebuffer_bits_per_pixel); |
| 1232 | assert_int_equal(out.mode.ha * 2, out.bytes_per_line); |
| 1233 | assert_int_equal(out.bytes_per_line / (16 / 8), out.x_resolution); |
| 1234 | assert_int_equal(out.mode.va, out.y_resolution); |
| 1235 | |
| 1236 | edid_set_framebuffer_bits_per_pixel(&out, 24, 4); |
| 1237 | |
| 1238 | assert_int_equal(24, out.framebuffer_bits_per_pixel); |
| 1239 | assert_int_equal(out.mode.ha * 3, out.bytes_per_line); |
| 1240 | assert_int_equal(out.bytes_per_line / (24 / 8), out.x_resolution); |
| 1241 | assert_int_equal(out.mode.va, out.y_resolution); |
| 1242 | |
| 1243 | edid_set_framebuffer_bits_per_pixel(&out, 32, 4); |
| 1244 | |
| 1245 | assert_int_equal(32, out.framebuffer_bits_per_pixel); |
| 1246 | assert_int_equal(out.mode.ha * 4, out.bytes_per_line); |
| 1247 | assert_int_equal(out.bytes_per_line / (32 / 8), out.x_resolution); |
| 1248 | assert_int_equal(out.mode.va, out.y_resolution); |
| 1249 | } |
| 1250 | |
| 1251 | int main(void) |
| 1252 | { |
| 1253 | const struct CMUnitTest tests[] = { |
| 1254 | cmocka_unit_test(test_decode_edid_no_edid), |
| 1255 | cmocka_unit_test(test_decode_edid_invalid_header), |
| 1256 | cmocka_unit_test_setup_teardown(test_decode_edid_basic_frame, |
| 1257 | setup_decode_edid_basic_frame, |
| 1258 | teardown_edid_test), |
| 1259 | cmocka_unit_test_setup_teardown(test_decode_edid_dtv_frame_with_extension, |
| 1260 | setup_decode_edid_dtv_frame_with_extension, |
| 1261 | teardown_edid_test), |
| 1262 | cmocka_unit_test_setup_teardown(test_decode_edid_it_dtv_frame_with_extension, |
| 1263 | setup_decode_edid_it_dtv_frame_with_extension, |
| 1264 | teardown_edid_test), |
| 1265 | cmocka_unit_test_setup_teardown(test_edid_set_framebuffer_bits_per_pixel, |
| 1266 | setup_decode_edid_basic_frame, |
| 1267 | teardown_edid_test), |
| 1268 | }; |
| 1269 | |
Jakub Czapiga | 7c6081e | 2021-08-25 16:27:35 +0200 | [diff] [blame] | 1270 | return cb_run_group_tests(tests, NULL, NULL); |
Jakub Czapiga | e0af9fc | 2020-10-09 16:02:46 +0200 | [diff] [blame] | 1271 | } |
| 1272 | |