Angel Pons | 230e4f9d | 2020-04-05 15:47:14 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Lee Leahy | d3de85c | 2016-02-20 17:15:33 -0800 | [diff] [blame] | 2 | |
Elyes HAOUAS | 20eaef0 | 2019-03-29 17:45:28 +0100 | [diff] [blame] | 3 | #include <console/console.h> |
Elyes HAOUAS | 276d46a | 2019-06-16 11:08:25 +0200 | [diff] [blame] | 4 | #include <device/pci_ops.h> |
Lee Leahy | d3de85c | 2016-02-20 17:15:33 -0800 | [diff] [blame] | 5 | #include <soc/acpi.h> |
Lee Leahy | a6de547 | 2016-02-21 16:04:53 -0800 | [diff] [blame] | 6 | #include <soc/ramstage.h> |
Lee Leahy | d3de85c | 2016-02-20 17:15:33 -0800 | [diff] [blame] | 7 | |
| 8 | unsigned long acpi_fill_madt(unsigned long current) |
| 9 | { |
| 10 | return current; |
| 11 | } |
| 12 | |
Kyösti Mälkki | 4164476 | 2020-05-30 18:02:32 +0300 | [diff] [blame] | 13 | void acpi_fill_fadt(acpi_fadt_t *fadt) |
Lee Leahy | d3de85c | 2016-02-20 17:15:33 -0800 | [diff] [blame] | 14 | { |
Kyösti Mälkki | c70eed1 | 2018-05-22 02:18:00 +0300 | [diff] [blame] | 15 | struct device *dev = pcidev_on_root(PCI_DEVICE_NUMBER_QNC_LPC, |
| 16 | PCI_FUNCTION_NUMBER_QNC_LPC); |
Lee Leahy | a6de547 | 2016-02-21 16:04:53 -0800 | [diff] [blame] | 17 | uint32_t gpe0_base = pci_read_config32(dev, R_QNC_LPC_GPE0BLK) |
| 18 | & B_QNC_LPC_GPE0BLK_MASK; |
| 19 | uint32_t pmbase = pci_read_config32(dev, R_QNC_LPC_PM1BLK) |
| 20 | & B_QNC_LPC_PM1BLK_MASK; |
| 21 | |
Angel Pons | 79572e4 | 2020-07-13 00:17:43 +0200 | [diff] [blame] | 22 | fadt->flags |= ACPI_FADT_PLATFORM_CLOCK; |
Lee Leahy | a6de547 | 2016-02-21 16:04:53 -0800 | [diff] [blame] | 23 | |
| 24 | /* PM1 Status: ACPI 4.8.3.1.1 */ |
| 25 | fadt->pm1a_evt_blk = pmbase + R_QNC_PM1BLK_PM1S; |
| 26 | fadt->pm1_evt_len = 2; |
| 27 | |
| 28 | fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO; |
| 29 | fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8; |
| 30 | fadt->x_pm1a_evt_blk.bit_offset = 0; |
Patrick Rudolph | c02bda0 | 2020-02-28 10:19:41 +0100 | [diff] [blame] | 31 | fadt->x_pm1a_evt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS; |
Lee Leahy | a6de547 | 2016-02-21 16:04:53 -0800 | [diff] [blame] | 32 | fadt->x_pm1a_evt_blk.addrl = pmbase + R_QNC_PM1BLK_PM1S; |
| 33 | fadt->x_pm1a_evt_blk.addrh = 0x0; |
| 34 | |
| 35 | /* PM1 Control: ACPI 4.8.3.2.1 */ |
| 36 | fadt->pm1a_cnt_blk = pmbase + R_QNC_PM1BLK_PM1C; |
| 37 | fadt->pm1_cnt_len = 2; |
| 38 | |
| 39 | fadt->x_pm1a_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO; |
| 40 | fadt->x_pm1a_cnt_blk.bit_width = fadt->pm1_cnt_len * 8; |
| 41 | fadt->x_pm1a_cnt_blk.bit_offset = 0; |
Patrick Rudolph | c02bda0 | 2020-02-28 10:19:41 +0100 | [diff] [blame] | 42 | fadt->x_pm1a_cnt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS; |
Lee Leahy | a6de547 | 2016-02-21 16:04:53 -0800 | [diff] [blame] | 43 | fadt->x_pm1a_cnt_blk.addrl = fadt->pm1a_cnt_blk; |
| 44 | fadt->x_pm1a_cnt_blk.addrh = 0x0; |
| 45 | |
| 46 | /* PM Timer: ACPI 4.8.3.3 */ |
| 47 | fadt->pm_tmr_blk = pmbase + R_QNC_PM1BLK_PM1T; |
| 48 | fadt->pm_tmr_len = 4; |
| 49 | |
| 50 | fadt->x_pm_tmr_blk.space_id = ACPI_ADDRESS_SPACE_IO; |
| 51 | fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8; |
| 52 | fadt->x_pm_tmr_blk.bit_offset = 0; |
Patrick Rudolph | c02bda0 | 2020-02-28 10:19:41 +0100 | [diff] [blame] | 53 | fadt->x_pm_tmr_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; |
Lee Leahy | a6de547 | 2016-02-21 16:04:53 -0800 | [diff] [blame] | 54 | fadt->x_pm_tmr_blk.addrl = fadt->pm_tmr_blk; |
| 55 | fadt->x_pm_tmr_blk.addrh = 0x0; |
| 56 | |
Lee Leahy | a6de547 | 2016-02-21 16:04:53 -0800 | [diff] [blame] | 57 | /* General-Purpose Event 0 Registers: ACPI 4.8.4.1 */ |
| 58 | fadt->gpe0_blk = gpe0_base; |
| 59 | fadt->gpe0_blk_len = 4 * 2; |
| 60 | |
| 61 | fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; |
| 62 | fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; |
| 63 | fadt->x_gpe0_blk.bit_offset = 0; |
Angel Pons | a23aff3 | 2020-06-21 20:47:54 +0200 | [diff] [blame] | 64 | fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; |
Lee Leahy | a6de547 | 2016-02-21 16:04:53 -0800 | [diff] [blame] | 65 | fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; |
| 66 | fadt->x_gpe0_blk.addrh = 0; |
| 67 | |
| 68 | /* Display the base registers */ |
Lee Leahy | f74ce24 | 2016-07-31 17:20:30 -0700 | [diff] [blame] | 69 | printk(BIOS_SPEW, "FADT:\n"); |
| 70 | printk(BIOS_SPEW, " 0x%08x: GPE0_BASE\n", gpe0_base); |
| 71 | printk(BIOS_SPEW, " 0x%08x: PMBASE\n", pmbase); |
| 72 | printk(BIOS_SPEW, " 0x%08x: RESET\n", fadt->reset_reg.addrl); |
Lee Leahy | a6de547 | 2016-02-21 16:04:53 -0800 | [diff] [blame] | 73 | |
Lee Leahy | d3de85c | 2016-02-20 17:15:33 -0800 | [diff] [blame] | 74 | } |
Eugene Myers | ebc8423 | 2020-01-21 16:46:16 -0500 | [diff] [blame] | 75 | |
| 76 | uint16_t get_pmbase(void) |
| 77 | { |
| 78 | struct device *dev = pcidev_on_root(PCI_DEVICE_NUMBER_QNC_LPC, |
| 79 | PCI_FUNCTION_NUMBER_QNC_LPC); |
| 80 | return (uint16_t) pci_read_config32(dev, R_QNC_LPC_PM1BLK) & B_QNC_LPC_PM1BLK_MASK; |
| 81 | } |