Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Andrey Petrov | c854b49 | 2017-06-05 14:10:17 -0700 | [diff] [blame] | 2 | |
| 3 | #include <intelblocks/gpio.h> |
| 4 | #include <intelblocks/pcr.h> |
| 5 | #include <soc/pcr_ids.h> |
Lijian Zhao | 031020e | 2017-12-15 12:58:07 -0800 | [diff] [blame] | 6 | #include <soc/pmc.h> |
Andrey Petrov | c854b49 | 2017-06-05 14:10:17 -0700 | [diff] [blame] | 7 | |
| 8 | static const struct reset_mapping rst_map[] = { |
| 9 | { .logical = PAD_CFG0_LOGICAL_RESET_RSMRST, .chipset = 0U << 30 }, |
| 10 | { .logical = PAD_CFG0_LOGICAL_RESET_DEEP, .chipset = 1U << 30 }, |
| 11 | { .logical = PAD_CFG0_LOGICAL_RESET_PLTRST, .chipset = 2U << 30 }, |
| 12 | }; |
| 13 | |
| 14 | static const struct reset_mapping rst_map_com0[] = { |
| 15 | { .logical = PAD_CFG0_LOGICAL_RESET_PWROK, .chipset = 0U << 30 }, |
| 16 | { .logical = PAD_CFG0_LOGICAL_RESET_DEEP, .chipset = 1U << 30 }, |
| 17 | { .logical = PAD_CFG0_LOGICAL_RESET_PLTRST, .chipset = 2U << 30 }, |
| 18 | { .logical = PAD_CFG0_LOGICAL_RESET_RSMRST, .chipset = 3U << 30 }, |
| 19 | }; |
| 20 | |
Duncan Laurie | 64c9f15 | 2018-12-10 11:27:47 -0800 | [diff] [blame] | 21 | /* |
| 22 | * The GPIO driver for Cannonlake on Windows/Linux expects 32 GPIOs per pad |
| 23 | * group, regardless of whether or not there is a physical pad for each |
| 24 | * exposed GPIO number. |
| 25 | * |
| 26 | * This results in the OS having a sparse GPIO map, and devices that need |
| 27 | * to export an ACPI GPIO must use the OS expected number. |
| 28 | * |
| 29 | * Not all pins are usable as GPIO and those groups do not have a pad base. |
| 30 | * |
| 31 | * This layout matches the Linux kernel pinctrl map for CNL-LP at: |
| 32 | * linux/drivers/pinctrl/intel/pinctrl-cannonlake.c |
| 33 | */ |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 34 | static const struct pad_group cnl_community0_groups[] = { |
Michael Niewöhner | 1c2b1b9 | 2020-09-09 21:34:05 +0200 | [diff] [blame] | 35 | INTEL_GPP_BASE(GPP_A0, GPP_A0, ESPI_CLK_LOOPBK, 0), /* GPP_A */ |
| 36 | INTEL_GPP_BASE(GPP_A0, GPP_B0, GSPI1_CLK_LOOPBK, 32), /* GPP_B */ |
Duncan Laurie | 64c9f15 | 2018-12-10 11:27:47 -0800 | [diff] [blame] | 37 | INTEL_GPP_BASE(GPP_A0, GPP_G0, GPP_G7, 64), /* GPP_G */ |
Michael Niewöhner | 1c2b1b9 | 2020-09-09 21:34:05 +0200 | [diff] [blame] | 38 | INTEL_GPP(GPP_A0, SPI0_IO_2, SPI0_CLK_LOOPBK), /* SPI */ |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 39 | }; |
| 40 | |
| 41 | static const struct pad_group cnl_community1_groups[] = { |
Michael Niewöhner | 1c2b1b9 | 2020-09-09 21:34:05 +0200 | [diff] [blame] | 42 | INTEL_GPP_BASE(GPP_D0, GPP_D0, GSPI2_CLK_LOOPBK, 96), /* GPP_D */ |
Duncan Laurie | 64c9f15 | 2018-12-10 11:27:47 -0800 | [diff] [blame] | 43 | INTEL_GPP_BASE(GPP_D0, GPP_F0, GPP_F23, 128), /* GPP_F */ |
| 44 | INTEL_GPP_BASE(GPP_D0, GPP_H0, GPP_H23, 160), /* GPP_H */ |
Rizwan Qureshi | 7471540 | 2019-02-21 14:52:39 +0530 | [diff] [blame] | 45 | INTEL_GPP_BASE(GPP_D0, CNV_BTEN, vSD3_CD_B, 192), /* VGPIO */ |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 46 | }; |
| 47 | |
Duncan Laurie | 64c9f15 | 2018-12-10 11:27:47 -0800 | [diff] [blame] | 48 | /* This community is not visible to the OS */ |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 49 | static const struct pad_group cnl_community2_groups[] = { |
Michael Niewöhner | 5d1a328 | 2020-09-09 21:53:58 +0200 | [diff] [blame] | 50 | INTEL_GPP(GPD0, GPD0, DRAM_RESET_B), /* GPD */ |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 51 | }; |
| 52 | |
Duncan Laurie | 64c9f15 | 2018-12-10 11:27:47 -0800 | [diff] [blame] | 53 | /* This community is not visible to the OS */ |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 54 | static const struct pad_group cnl_community3_groups[] = { |
Michael Niewöhner | 1c2b1b9 | 2020-09-09 21:34:05 +0200 | [diff] [blame] | 55 | INTEL_GPP(HDA_BCLK, HDA_BCLK, I2S1_TXD), /* AZA */ |
| 56 | INTEL_GPP(HDA_BCLK, HDACPU_SDI, TRIGGER_OUT), /* CPU */ |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 57 | }; |
| 58 | |
| 59 | static const struct pad_group cnl_community4_groups[] = { |
Duncan Laurie | 64c9f15 | 2018-12-10 11:27:47 -0800 | [diff] [blame] | 60 | INTEL_GPP_BASE(GPP_C0, GPP_C0, GPP_C23, 256), /* GPP_C */ |
| 61 | INTEL_GPP_BASE(GPP_C0, GPP_E0, GPP_E23, 288), /* GPP_E */ |
Michael Niewöhner | 1c2b1b9 | 2020-09-09 21:34:05 +0200 | [diff] [blame] | 62 | INTEL_GPP(GPP_C0, PCH_TDO, ITP_PMODE), /* JTAG */ |
| 63 | INTEL_GPP(GPP_C0, EDP_BKLTEN, CL_RST_B), /* HVMOS */ |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 64 | }; |
| 65 | |
Subrata Banik | 76a8f9e | 2019-05-15 21:23:18 +0530 | [diff] [blame] | 66 | static const struct pad_community cnl_communities[TOTAL_GPIO_COMM] = { |
| 67 | /* GPP A, B, G, SPI */ |
| 68 | [COMM_0] = { |
Andrey Petrov | c854b49 | 2017-06-05 14:10:17 -0700 | [diff] [blame] | 69 | .port = PID_GPIOCOM0, |
| 70 | .first_pad = GPP_A0, |
Michael Niewöhner | 1c2b1b9 | 2020-09-09 21:34:05 +0200 | [diff] [blame] | 71 | .last_pad = SPI0_CLK_LOOPBK, |
Andrey Petrov | c854b49 | 2017-06-05 14:10:17 -0700 | [diff] [blame] | 72 | .num_gpi_regs = NUM_GPIO_COM0_GPI_REGS, |
| 73 | .pad_cfg_base = PAD_CFG_BASE, |
| 74 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
Karthikeyan Ramasubramanian | c126084 | 2019-04-23 15:18:51 -0600 | [diff] [blame] | 75 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 76 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Andrey Petrov | c854b49 | 2017-06-05 14:10:17 -0700 | [diff] [blame] | 77 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 78 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
Michael Niewöhner | 51f5ff6 | 2020-11-23 22:05:36 +0100 | [diff] [blame] | 79 | .gpi_nmi_sts_reg_0 = GPI_NMI_STS_0, |
| 80 | .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, |
Andrey Petrov | c854b49 | 2017-06-05 14:10:17 -0700 | [diff] [blame] | 81 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
| 82 | .name = "GPP_ABG", |
| 83 | .acpi_path = "\\_SB.PCI0.GPIO", |
| 84 | .reset_map = rst_map_com0, |
| 85 | .num_reset_vals = ARRAY_SIZE(rst_map_com0), |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 86 | .groups = cnl_community0_groups, |
| 87 | .num_groups = ARRAY_SIZE(cnl_community0_groups), |
Subrata Banik | 76a8f9e | 2019-05-15 21:23:18 +0530 | [diff] [blame] | 88 | }, |
| 89 | /* GPP D, F, H, VGPIO */ |
| 90 | [COMM_1] = { |
Andrey Petrov | c854b49 | 2017-06-05 14:10:17 -0700 | [diff] [blame] | 91 | .port = PID_GPIOCOM1, |
| 92 | .first_pad = GPP_D0, |
Rizwan Qureshi | 7471540 | 2019-02-21 14:52:39 +0530 | [diff] [blame] | 93 | .last_pad = vSD3_CD_B, |
Andrey Petrov | c854b49 | 2017-06-05 14:10:17 -0700 | [diff] [blame] | 94 | .num_gpi_regs = NUM_GPIO_COM1_GPI_REGS, |
| 95 | .pad_cfg_base = PAD_CFG_BASE, |
| 96 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
Karthikeyan Ramasubramanian | c126084 | 2019-04-23 15:18:51 -0600 | [diff] [blame] | 97 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 98 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Andrey Petrov | c854b49 | 2017-06-05 14:10:17 -0700 | [diff] [blame] | 99 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 100 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
Michael Niewöhner | 51f5ff6 | 2020-11-23 22:05:36 +0100 | [diff] [blame] | 101 | .gpi_nmi_sts_reg_0 = GPI_NMI_STS_0, |
| 102 | .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, |
Andrey Petrov | c854b49 | 2017-06-05 14:10:17 -0700 | [diff] [blame] | 103 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
| 104 | .name = "GPP_DFH", |
| 105 | .acpi_path = "\\_SB.PCI0.GPIO", |
| 106 | .reset_map = rst_map, |
| 107 | .num_reset_vals = ARRAY_SIZE(rst_map), |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 108 | .groups = cnl_community1_groups, |
| 109 | .num_groups = ARRAY_SIZE(cnl_community1_groups), |
Subrata Banik | 76a8f9e | 2019-05-15 21:23:18 +0530 | [diff] [blame] | 110 | }, |
| 111 | /* GPD */ |
| 112 | [COMM_2] = { |
Andrey Petrov | c854b49 | 2017-06-05 14:10:17 -0700 | [diff] [blame] | 113 | .port = PID_GPIOCOM2, |
| 114 | .first_pad = GPD0, |
Michael Niewöhner | 5d1a328 | 2020-09-09 21:53:58 +0200 | [diff] [blame] | 115 | .last_pad = DRAM_RESET_B, |
Andrey Petrov | c854b49 | 2017-06-05 14:10:17 -0700 | [diff] [blame] | 116 | .num_gpi_regs = NUM_GPIO_COM2_GPI_REGS, |
| 117 | .pad_cfg_base = PAD_CFG_BASE, |
| 118 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
Karthikeyan Ramasubramanian | c126084 | 2019-04-23 15:18:51 -0600 | [diff] [blame] | 119 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 120 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Andrey Petrov | c854b49 | 2017-06-05 14:10:17 -0700 | [diff] [blame] | 121 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 122 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
Michael Niewöhner | 51f5ff6 | 2020-11-23 22:05:36 +0100 | [diff] [blame] | 123 | .gpi_nmi_sts_reg_0 = GPI_NMI_STS_0, |
| 124 | .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, |
Andrey Petrov | c854b49 | 2017-06-05 14:10:17 -0700 | [diff] [blame] | 125 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
| 126 | .name = "GPD", |
| 127 | .acpi_path = "\\_SB.PCI0.GPIO", |
| 128 | .reset_map = rst_map, |
| 129 | .num_reset_vals = ARRAY_SIZE(rst_map), |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 130 | .groups = cnl_community2_groups, |
| 131 | .num_groups = ARRAY_SIZE(cnl_community2_groups), |
Subrata Banik | 76a8f9e | 2019-05-15 21:23:18 +0530 | [diff] [blame] | 132 | }, |
| 133 | /* AZA, CPU */ |
| 134 | [COMM_3] = { |
Lijian Zhao | b716e550 | 2017-11-10 17:14:01 -0800 | [diff] [blame] | 135 | .port = PID_GPIOCOM3, |
| 136 | .first_pad = HDA_BCLK, |
Michael Niewöhner | 1c2b1b9 | 2020-09-09 21:34:05 +0200 | [diff] [blame] | 137 | .last_pad = TRIGGER_OUT, |
Andrey Petrov | c854b49 | 2017-06-05 14:10:17 -0700 | [diff] [blame] | 138 | .num_gpi_regs = NUM_GPIO_COM3_GPI_REGS, |
| 139 | .pad_cfg_base = PAD_CFG_BASE, |
| 140 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
Karthikeyan Ramasubramanian | c126084 | 2019-04-23 15:18:51 -0600 | [diff] [blame] | 141 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 142 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Andrey Petrov | c854b49 | 2017-06-05 14:10:17 -0700 | [diff] [blame] | 143 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 144 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
Michael Niewöhner | 51f5ff6 | 2020-11-23 22:05:36 +0100 | [diff] [blame] | 145 | .gpi_nmi_sts_reg_0 = GPI_NMI_STS_0, |
| 146 | .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, |
Andrey Petrov | c854b49 | 2017-06-05 14:10:17 -0700 | [diff] [blame] | 147 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
Lijian Zhao | b716e550 | 2017-11-10 17:14:01 -0800 | [diff] [blame] | 148 | .name = "GP_AC", |
| 149 | .acpi_path = "\\_SB.PCI0.GPIO", |
| 150 | .reset_map = rst_map, |
| 151 | .num_reset_vals = ARRAY_SIZE(rst_map), |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 152 | .groups = cnl_community3_groups, |
| 153 | .num_groups = ARRAY_SIZE(cnl_community3_groups), |
Subrata Banik | 76a8f9e | 2019-05-15 21:23:18 +0530 | [diff] [blame] | 154 | }, |
| 155 | /* GPP C, E, JTAG, HVMOS */ |
| 156 | [COMM_4] = { |
Lijian Zhao | b716e550 | 2017-11-10 17:14:01 -0800 | [diff] [blame] | 157 | .port = PID_GPIOCOM4, |
| 158 | .first_pad = GPP_C0, |
Michael Niewöhner | 1c2b1b9 | 2020-09-09 21:34:05 +0200 | [diff] [blame] | 159 | .last_pad = CL_RST_B, |
Lijian Zhao | b716e550 | 2017-11-10 17:14:01 -0800 | [diff] [blame] | 160 | .num_gpi_regs = NUM_GPIO_COM4_GPI_REGS, |
| 161 | .pad_cfg_base = PAD_CFG_BASE, |
| 162 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
Karthikeyan Ramasubramanian | c126084 | 2019-04-23 15:18:51 -0600 | [diff] [blame] | 163 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 164 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Lijian Zhao | b716e550 | 2017-11-10 17:14:01 -0800 | [diff] [blame] | 165 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 166 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
Michael Niewöhner | 51f5ff6 | 2020-11-23 22:05:36 +0100 | [diff] [blame] | 167 | .gpi_nmi_sts_reg_0 = GPI_NMI_STS_0, |
| 168 | .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, |
Lijian Zhao | b716e550 | 2017-11-10 17:14:01 -0800 | [diff] [blame] | 169 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
| 170 | .name = "GPP_CEJ", |
Andrey Petrov | c854b49 | 2017-06-05 14:10:17 -0700 | [diff] [blame] | 171 | .acpi_path = "\\_SB.PCI0.GPIO", |
| 172 | .reset_map = rst_map, |
| 173 | .num_reset_vals = ARRAY_SIZE(rst_map), |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 174 | .groups = cnl_community4_groups, |
| 175 | .num_groups = ARRAY_SIZE(cnl_community4_groups), |
Andrey Petrov | c854b49 | 2017-06-05 14:10:17 -0700 | [diff] [blame] | 176 | } |
| 177 | }; |
| 178 | |
| 179 | const struct pad_community *soc_gpio_get_community(size_t *num_communities) |
| 180 | { |
| 181 | *num_communities = ARRAY_SIZE(cnl_communities); |
| 182 | return cnl_communities; |
| 183 | } |
Lijian Zhao | ac87a98 | 2017-08-28 17:46:55 -0700 | [diff] [blame] | 184 | |
| 185 | const struct pmc_to_gpio_route *soc_pmc_gpio_routes(size_t *num) |
| 186 | { |
| 187 | static const struct pmc_to_gpio_route routes[] = { |
Lijian Zhao | 031020e | 2017-12-15 12:58:07 -0800 | [diff] [blame] | 188 | { PMC_GPP_A, GPP_A }, |
| 189 | { PMC_GPP_B, GPP_B }, |
| 190 | { PMC_GPP_C, GPP_C }, |
| 191 | { PMC_GPP_D, GPP_D }, |
| 192 | { PMC_GPP_E, GPP_E }, |
| 193 | { PMC_GPP_F, GPP_F }, |
| 194 | { PMC_GPP_G, GPP_G }, |
| 195 | { PMC_GPP_H, GPP_H }, |
| 196 | { PMC_GPD, GPD }, |
Lijian Zhao | ac87a98 | 2017-08-28 17:46:55 -0700 | [diff] [blame] | 197 | }; |
| 198 | *num = ARRAY_SIZE(routes); |
| 199 | return routes; |
| 200 | } |