Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Hannah Williams | 733b39a | 2016-02-11 13:46:28 -0800 | [diff] [blame] | 2 | |
Subrata Banik | 2153ea5 | 2017-11-22 15:38:19 +0530 | [diff] [blame] | 3 | #include "chip.h" |
| 4 | #include <console/console.h> |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 5 | #include <device/mmio.h> |
Hannah Williams | 733b39a | 2016-02-11 13:46:28 -0800 | [diff] [blame] | 6 | #include <device/device.h> |
| 7 | #include <device/pci.h> |
Subrata Banik | 2153ea5 | 2017-11-22 15:38:19 +0530 | [diff] [blame] | 8 | #include <intelblocks/pmc.h> |
Shaunak Saha | 93cdc8b | 2017-04-18 15:42:09 -0700 | [diff] [blame] | 9 | #include <intelblocks/pmclib.h> |
Hannah Williams | 733b39a | 2016-02-11 13:46:28 -0800 | [diff] [blame] | 10 | #include <soc/iomap.h> |
Shaunak Saha | 5b6c5a5 | 2016-06-07 02:06:28 -0700 | [diff] [blame] | 11 | #include <soc/pm.h> |
Aaron Durbin | 41a3fa6 | 2016-08-25 15:42:04 -0500 | [diff] [blame] | 12 | #include <timer.h> |
Hannah Williams | 733b39a | 2016-02-11 13:46:28 -0800 | [diff] [blame] | 13 | |
Subrata Banik | 2153ea5 | 2017-11-22 15:38:19 +0530 | [diff] [blame] | 14 | /* Fill up PMC resource structure */ |
| 15 | int pmc_soc_get_resources(struct pmc_resource_config *cfg) |
Hannah Williams | 733b39a | 2016-02-11 13:46:28 -0800 | [diff] [blame] | 16 | { |
Subrata Banik | 2153ea5 | 2017-11-22 15:38:19 +0530 | [diff] [blame] | 17 | cfg->pwrmbase_offset = PCI_BASE_ADDRESS_0; |
| 18 | cfg->pwrmbase_addr = PMC_BAR0; |
| 19 | cfg->pwrmbase_size = PMC_BAR0_SIZE; |
| 20 | cfg->abase_offset = PCI_BASE_ADDRESS_4; |
| 21 | cfg->abase_addr = ACPI_BASE_ADDRESS; |
| 22 | cfg->abase_size = ACPI_BASE_SIZE; |
Hannah Williams | 733b39a | 2016-02-11 13:46:28 -0800 | [diff] [blame] | 23 | |
Subrata Banik | 2153ea5 | 2017-11-22 15:38:19 +0530 | [diff] [blame] | 24 | return 0; |
Shaunak Saha | 09115a9 | 2016-07-24 20:50:12 -0700 | [diff] [blame] | 25 | } |
| 26 | |
Aaron Durbin | 41a3fa6 | 2016-08-25 15:42:04 -0500 | [diff] [blame] | 27 | static int choose_slp_s3_assertion_width(int width_usecs) |
| 28 | { |
| 29 | int i; |
| 30 | static const struct { |
| 31 | int max_width; |
| 32 | int value; |
| 33 | } slp_s3_settings[] = { |
| 34 | { |
| 35 | .max_width = 60, |
| 36 | .value = SLP_S3_ASSERT_60_USEC, |
| 37 | }, |
| 38 | { |
| 39 | .max_width = 1 * USECS_PER_MSEC, |
| 40 | .value = SLP_S3_ASSERT_1_MSEC, |
| 41 | }, |
| 42 | { |
| 43 | .max_width = 50 * USECS_PER_MSEC, |
| 44 | .value = SLP_S3_ASSERT_50_MSEC, |
| 45 | }, |
| 46 | { |
| 47 | .max_width = 2 * USECS_PER_SEC, |
| 48 | .value = SLP_S3_ASSERT_2_SEC, |
| 49 | }, |
| 50 | }; |
| 51 | |
| 52 | for (i = 0; i < ARRAY_SIZE(slp_s3_settings); i++) { |
| 53 | if (width_usecs <= slp_s3_settings[i].max_width) |
| 54 | break; |
| 55 | } |
| 56 | |
| 57 | /* Provide conservative default if nothing set in devicetree |
| 58 | * or requested assertion width too large. */ |
| 59 | if (width_usecs <= 0 || i == ARRAY_SIZE(slp_s3_settings)) |
| 60 | i = ARRAY_SIZE(slp_s3_settings) - 1; |
| 61 | |
| 62 | printk(BIOS_DEBUG, "SLP S3 assertion width: %d usecs\n", |
| 63 | slp_s3_settings[i].max_width); |
| 64 | |
| 65 | return slp_s3_settings[i].value; |
| 66 | } |
| 67 | |
| 68 | static void set_slp_s3_assertion_width(int width_usecs) |
| 69 | { |
| 70 | uint32_t reg; |
Shaunak Saha | 93cdc8b | 2017-04-18 15:42:09 -0700 | [diff] [blame] | 71 | uintptr_t gen_pmcon3 = soc_read_pmc_base() + GEN_PMCON3; |
Aaron Durbin | 41a3fa6 | 2016-08-25 15:42:04 -0500 | [diff] [blame] | 72 | int setting = choose_slp_s3_assertion_width(width_usecs); |
| 73 | |
Angel Pons | f585c6e | 2021-06-25 10:09:35 +0200 | [diff] [blame] | 74 | reg = read32p(gen_pmcon3); |
Aaron Durbin | 41a3fa6 | 2016-08-25 15:42:04 -0500 | [diff] [blame] | 75 | reg &= ~SLP_S3_ASSERT_MASK; |
| 76 | reg |= setting << SLP_S3_ASSERT_WIDTH_SHIFT; |
Angel Pons | f585c6e | 2021-06-25 10:09:35 +0200 | [diff] [blame] | 77 | write32p(gen_pmcon3, reg); |
Aaron Durbin | 41a3fa6 | 2016-08-25 15:42:04 -0500 | [diff] [blame] | 78 | } |
| 79 | |
Subrata Banik | 2153ea5 | 2017-11-22 15:38:19 +0530 | [diff] [blame] | 80 | void pmc_soc_init(struct device *dev) |
Shaunak Saha | 5b6c5a5 | 2016-06-07 02:06:28 -0700 | [diff] [blame] | 81 | { |
Kyösti Mälkki | 8950cfb | 2019-07-13 22:16:25 +0300 | [diff] [blame] | 82 | const struct soc_intel_apollolake_config *cfg = config_of(dev); |
Aaron Durbin | 41a3fa6 | 2016-08-25 15:42:04 -0500 | [diff] [blame] | 83 | |
Shaunak Saha | 5b6c5a5 | 2016-06-07 02:06:28 -0700 | [diff] [blame] | 84 | /* Set up GPE configuration */ |
| 85 | pmc_gpe_init(); |
Subrata Banik | 2153ea5 | 2017-11-22 15:38:19 +0530 | [diff] [blame] | 86 | pmc_set_acpi_mode(); |
Brandon Breitenstein | 3b0e761 | 2016-07-18 15:14:12 -0700 | [diff] [blame] | 87 | |
Aaron Durbin | 41a3fa6 | 2016-08-25 15:42:04 -0500 | [diff] [blame] | 88 | if (cfg != NULL) |
| 89 | set_slp_s3_assertion_width(cfg->slp_s3_assertion_width_usecs); |
| 90 | |
Brandon Breitenstein | 3b0e761 | 2016-07-18 15:14:12 -0700 | [diff] [blame] | 91 | /* Log power state */ |
| 92 | pch_log_state(); |
Aaron Durbin | db52f23 | 2016-10-14 10:44:23 -0500 | [diff] [blame] | 93 | |
| 94 | /* Now that things have been logged clear out the PMC state. */ |
Furquan Shaikh | c4e652f | 2017-10-11 14:44:29 -0700 | [diff] [blame] | 95 | pmc_clear_prsts(); |
Nico Huber | 2fe596e | 2019-01-31 14:31:35 +0100 | [diff] [blame] | 96 | |
| 97 | pmc_set_power_failure_state(true); |
Shaunak Saha | 5b6c5a5 | 2016-06-07 02:06:28 -0700 | [diff] [blame] | 98 | } |