Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 1 | chip northbridge/intel/sandybridge |
Vladimir Serbinenko | dd2bc3f | 2014-10-31 09:16:31 +0100 | [diff] [blame] | 2 | # IGD Displays |
Nico Huber | b0b25c8 | 2020-03-21 20:35:12 +0100 | [diff] [blame] | 3 | register "gfx" = "GMA_STATIC_DISPLAYS(0)" |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 4 | |
| 5 | # Enable DisplayPort 1 Hotplug with 6ms pulse |
| 6 | register "gpu_dp_d_hotplug" = "0x06" |
| 7 | |
| 8 | # Enable DisplayPort 0 Hotplug with 6ms pulse |
| 9 | register "gpu_dp_c_hotplug" = "0x06" |
| 10 | |
| 11 | # Enable DVI Hotplug with 6ms pulse |
| 12 | register "gpu_dp_b_hotplug" = "0x06" |
| 13 | |
Stefan Reinauer | 0aa37c4 | 2013-02-12 15:20:54 -0800 | [diff] [blame] | 14 | device cpu_cluster 0 on |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 15 | chip cpu/intel/model_206ax |
| 16 | # Magic APIC ID to locate this chip |
Angel Pons | c56c723 | 2021-05-17 11:03:55 +0200 | [diff] [blame] | 17 | device lapic 0 on end |
Arthur Heymans | b3f2323 | 2019-01-21 17:48:55 +0100 | [diff] [blame] | 18 | device lapic 0xacac off end |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 19 | |
Angel Pons | 6f56a23 | 2021-01-04 17:02:23 +0100 | [diff] [blame] | 20 | register "acpi_c1" = "3" # ACPI(C1) = MWAIT(C3) |
| 21 | register "acpi_c2" = "4" # ACPI(C2) = MWAIT(C6) |
| 22 | register "acpi_c3" = "5" # ACPI(C3) = MWAIT(C7) |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 23 | end |
| 24 | end |
| 25 | |
Stefan Reinauer | 4aff445 | 2013-02-12 14:17:15 -0800 | [diff] [blame] | 26 | device domain 0 on |
Angel Pons | 8b45399 | 2020-01-01 21:47:52 +0100 | [diff] [blame] | 27 | device pci 00.0 on end # host bridge |
| 28 | device pci 02.0 on end # vga controller |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 29 | |
Angel Pons | 8b45399 | 2020-01-01 21:47:52 +0100 | [diff] [blame] | 30 | chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 31 | # GPI routing |
| 32 | # 0 No effect (default) |
| 33 | # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) |
| 34 | # 2 SCI (if corresponding GPIO_EN bit is also set) |
Angel Pons | 8b45399 | 2020-01-01 21:47:52 +0100 | [diff] [blame] | 35 | register "gpi1_routing" = "1" |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 36 | register "gpi14_routing" = "2" |
Gabe Black | 5fe7a20 | 2012-03-29 17:58:52 -0700 | [diff] [blame] | 37 | register "alt_gp_smi_en" = "0x0002" |
| 38 | register "gpe0_en" = "0x4000" |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 39 | |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 40 | register "sata_port_map" = "0x3f" |
| 41 | |
Arthur Heymans | 6beaef9 | 2019-06-16 23:29:23 +0200 | [diff] [blame] | 42 | register "gen1_dec" = "0x00fc1601" |
| 43 | # runtime_port registers |
| 44 | register "gen2_dec" = "0x000c0181" |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 45 | # SuperIO range is 0x700-0x73f |
Arthur Heymans | 6beaef9 | 2019-06-16 23:29:23 +0200 | [diff] [blame] | 46 | register "gen3_dec" = "0x003c0701" |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 47 | |
Angel Pons | 8b45399 | 2020-01-01 21:47:52 +0100 | [diff] [blame] | 48 | device pci 16.0 on end # Management Engine Interface 1 |
| 49 | device pci 16.1 off end # Management Engine Interface 2 |
| 50 | device pci 16.2 off end # Management Engine IDE-R |
| 51 | device pci 16.3 off end # Management Engine KT |
| 52 | device pci 19.0 off end # Intel Gigabit Ethernet |
| 53 | device pci 1a.0 on end # USB2 EHCI #2 |
| 54 | device pci 1b.0 on end # High Definition Audio |
| 55 | device pci 1c.0 on end # PCIe Port #1 (WLAN) |
| 56 | device pci 1c.1 off end # PCIe Port #2 |
| 57 | device pci 1c.2 on end # PCIe Port #3 (Debug) |
| 58 | device pci 1c.3 on end # PCIe Port #4 (LAN) |
| 59 | device pci 1c.4 off end # PCIe Port #5 |
| 60 | device pci 1c.5 off end # PCIe Port #6 |
| 61 | device pci 1c.6 off end # PCIe Port #7 |
| 62 | device pci 1c.7 off end # PCIe Port #8 |
| 63 | device pci 1d.0 on end # USB2 EHCI #1 |
| 64 | device pci 1e.0 off end # PCI bridge |
| 65 | device pci 1f.0 on end # LPC bridge |
| 66 | device pci 1f.2 on end # SATA Controller 1 |
| 67 | device pci 1f.3 on end # SMBus |
| 68 | device pci 1f.5 off end # SATA Controller 2 |
| 69 | device pci 1f.6 on end # Thermal |
Stefan Reinauer | 6651da3 | 2012-04-27 23:16:30 +0200 | [diff] [blame] | 70 | end |
| 71 | end |
| 72 | end |