blob: ed8027d9334110c0f3d27e51932ed70548df68d9 [file] [log] [blame]
Mark Hsieha96e9cb2021-06-23 16:23:44 +08001fw_config
2 field DB_USB 0 3
Mark Hsieh28d15502021-09-09 22:07:41 +08003 option USB_ABSENT 0
4 option USB3_PS8815 1
Mark Hsieha96e9cb2021-06-23 16:23:44 +08005 end
6 field DB_SD 4 5
Mark Hsieh28d15502021-09-09 22:07:41 +08007 option SD_ABSENT 0
8 option SD_GL9750H 1
Mark Hsieha96e9cb2021-06-23 16:23:44 +08009 end
10 field KB_BL 7 7
Mark Hsieh28d15502021-09-09 22:07:41 +080011 option KB_BL_ABSENT 0
12 option KB_BL_PRESENT 1
Mark Hsieha96e9cb2021-06-23 16:23:44 +080013 end
14 field AUDIO 8 10
Mark Hsieh28d15502021-09-09 22:07:41 +080015 option AUDIO_UNKNOWN 0
16 option MAX98390_ALC5682I_I2S 1
17 option MAX98390_ALC5682I_I2S_SSP1 2
Mark Hsieha96e9cb2021-06-23 16:23:44 +080018 end
19 field DB_LTE 11 12
Mark Hsieh28d15502021-09-09 22:07:41 +080020 option LTE_ABSENT 0
Mark Hsieha96e9cb2021-06-23 16:23:44 +080021 end
22end
Mark Hsieh352042f2021-06-08 09:12:15 +080023chip soc/intel/alderlake
MAULIK V VAGHELA215a97e2022-03-07 18:39:17 +053024 register "sagv" = "SaGv_Enabled"
25 register "platform_pmax" = "143"
26 register "tcss_aux_ori" = "1"
Mark Hsieheb3260b2021-11-22 15:26:15 +080027 # Acoustic settings
MAULIK V VAGHELA215a97e2022-03-07 18:39:17 +053028 register "acoustic_noise_mitigation" = "1"
29 register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
30 register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8"
31 register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1"
32 register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1"
Mark Hsieheb3260b2021-11-22 15:26:15 +080033
Mark Hsieh1cb77d12022-06-28 18:26:37 +080034 # As per Intel Advisory doc#723158, the change is required to prevent possible
35 # display flickering issue.
36 register "usb2_phy_sus_pg_disable" = "1"
37
Scott Chao6db97a32021-07-30 17:25:38 +080038 register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
Sridhar Siricillab25261f2022-02-05 19:40:01 +053039 register "usb2_ports[1]" = "USB2_PORT_MAX_TYPE_C(OC1)" # set MAX to USB2_C1 for eye diagram
Mark Hsieha96e9cb2021-06-23 16:23:44 +080040 register "usb2_ports[2]" = "USB2_PORT_EMPTY" # Disable USB2_C2
41 register "usb2_ports[3]" = "USB2_PORT_EMPTY" # M.2 WWAN
42 register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MLB Port
43 register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Type-A DB Port
44 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port
Meera Ravindranath1d886632022-01-20 14:01:34 +053045 register "tcss_ports[1]" = "TCSS_PORT_EMPTY"
Mark Hsieh44577682021-11-23 22:54:01 +080046 # Intel Common SoC Config
47 #+-------------------+---------------------------+
48 #| Field | Value |
49 #+-------------------+---------------------------+
50 #| GSPI1 | Fingerprint MCU |
51 #| I2C0 | Audio and WFC |
52 #| I2C1 | cr50 TPM. Early init is |
53 #| | required to set up a BAR |
54 #| | for TPM communication |
55 #| I2C2 | SAR0 |
56 #| I2C3 | Touchscreen |
57 #| | |
58 #| | |
59 #| I2C5 | Trackpad |
60 #+-------------------+---------------------------+
61 register "common_soc_config" = "{
62 .i2c[1] = {
63 .early_init = 1,
64 .speed = I2C_SPEED_FAST,
65 .rise_time_ns = 600,
66 .fall_time_ns = 400,
67 .data_hold_time_ns = 50,
68 },
69 .i2c[3] = {
70 .speed = I2C_SPEED_FAST,
71 .rise_time_ns = 650,
72 .fall_time_ns = 400,
73 .data_hold_time_ns = 50,
74 },
75 }"
Mark Hsieha96e9cb2021-06-23 16:23:44 +080076 device domain 0 on
Won Chung1c8f5c72023-07-31 22:17:44 +000077 device ref igpu on
78 chip drivers/gfx/generic
79 register "device_count" = "6"
80 # DDIA for eDP
Matt DeVillier4e685bf2024-01-19 20:37:58 -060081 register "device[0].name" = ""LCD0""
Matt DeVilliercf29efa2024-01-16 18:46:20 -060082 # Internal panel on the first port of the graphics chip
83 register "device[0].addr" = "0x80010400"
Won Chung1c8f5c72023-07-31 22:17:44 +000084 # DDIB for HDMI
85 register "device[1].name" = ""DD01""
86 # TCP0 (DP-1) for port C0
87 register "device[2].name" = ""DD02""
88 register "device[2].use_pld" = "true"
89 register "device[2].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(1, 1))"
90 # TCP1 (DP-2) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP1
91 register "device[3].name" = ""DD03""
92 # TCP2 (DP-3) for port C1
93 register "device[4].name" = ""DD04""
94 register "device[4].use_pld" = "true"
95 register "device[4].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
96 # TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3
97 register "device[5].name" = ""DD05""
98 device generic 0 on end
99 end
100 end # Integrated Graphics Device
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800101 device ref dtt on
102 chip drivers/intel/dptf
103 ## sensor information
104 register "options.tsr[0].desc" = ""DRAM""
Mark Hsieha9a0b332021-09-22 21:25:00 +0800105 register "options.tsr[1].desc" = ""Fan""
106 register "options.tsr[2].desc" = ""Charger""
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800107 # TODO: below values are initial reference values only
Scott Chaof2be7d62021-08-03 16:23:08 +0800108
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800109 ## Passive Policy
110 register "policies.passive" = "{
111 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
112 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000),
Mark Hsieha9a0b332021-09-22 21:25:00 +0800113 [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000),
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800114 }"
115 ## Critical Policy
116 register "policies.critical" = "{
117 [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
118 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
Mark Hsieha9a0b332021-09-22 21:25:00 +0800119 [2] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN),
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800120 }"
121 register "controls.power_limits" = "{
122 .pl1 = {
Sumeet Pawnikarf1d0c822021-10-27 16:42:10 +0530123 .min_power = 12000,
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800124 .max_power = 15000,
125 .time_window_min = 28 * MSECS_PER_SEC,
126 .time_window_max = 32 * MSECS_PER_SEC,
127 .granularity = 200,
128 },
129 .pl2 = {
130 .min_power = 55000,
131 .max_power = 55000,
132 .time_window_min = 28 * MSECS_PER_SEC,
133 .time_window_max = 32 * MSECS_PER_SEC,
134 .granularity = 1000,
135 }
136 }"
137 ## Charger Performance Control (Control, mA)
138 register "controls.charger_perf" = "{
139 [0] = { 255, 1700 },
140 [1] = { 24, 1500 },
141 [2] = { 16, 1000 },
142 [3] = { 8, 500 }
143 }"
Furquan Shaikh4aba7392021-09-20 10:51:45 -0700144 device generic 0 alias dptf_policy on end
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800145 end
146 end
147 device ref cnvi_wifi on
148 chip drivers/wifi/generic
149 register "wake" = "GPE0_PME_B0"
150 device generic 0 on end
151 end
152 end
Meera Ravindranath1d886632022-01-20 14:01:34 +0530153 device ref pcie_rp6 off end
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800154 device ref pcie_rp8 on
155 chip soc/intel/common/block/pcie/rtd3
156 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
157 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D18)"
158 register "srcclk_pin" = "3"
159 device generic 0 on end
160 end
161 end #PCIE8 SD card
162 device ref i2c0 on
163 chip drivers/i2c/generic
164 register "hid" = ""10EC5682""
165 register "name" = ""RT58""
166 register "desc" = ""Headset Codec""
167 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
168 # Set the jd_src to RT5668_JD1 for jack detection
169 register "property_count" = "1"
170 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
171 register "property_list[0].name" = ""realtek,jd-src""
172 register "property_list[0].integer" = "1"
173 device i2c 1a on
Mark Hsieh9ed8e382021-09-15 21:23:17 +0800174 probe AUDIO MAX98390_ALC5682I_I2S
175 end
176 end
177 chip drivers/i2c/generic
178 register "hid" = ""RTL5682""
179 register "name" = ""RT58""
180 register "desc" = ""Headset Codec""
181 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
182 # Set the jd_src to RT5668_JD1 for jack detection
183 register "property_count" = "1"
184 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
185 register "property_list[0].name" = ""realtek,jd-src""
186 register "property_list[0].integer" = "1"
187 device i2c 1a on
188 probe AUDIO MAX98390_ALC5682I_I2S_SSP1
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800189 end
190 end
Mark Hsiehf41da472021-08-02 18:36:39 +0800191 chip drivers/i2c/max98390
192 register "desc" = ""MAX98390 Speaker Amp 0""
193 register "uid" = "0"
194 register "name" = ""MXW0""
195 register "r0_calib_key" = ""dsm_calib_r0_0""
196 register "temperature_calib_key" = ""dsm_calib_temp_0""
Mark Hsiehb11de6f2021-11-09 21:45:08 +0800197 register "dsm_param_file_name" = ""dsm_param_R""
Mark Hsieh3673a162021-09-22 20:50:33 +0800198 register "vmon_slot_no" = "0"
199 register "imon_slot_no" = "1"
Mark Hsieh111bc432021-08-20 16:59:57 +0800200 device i2c 0x38 on
Mark Hsiehf41da472021-08-02 18:36:39 +0800201 end
202 end
203 chip drivers/i2c/max98390
204 register "desc" = ""MAX98390 Speaker Amp 1""
205 register "uid" = "1"
206 register "name" = ""MXW1""
207 register "r0_calib_key" = ""dsm_calib_r0_1""
208 register "temperature_calib_key" = ""dsm_calib_temp_1""
Mark Hsiehb11de6f2021-11-09 21:45:08 +0800209 register "dsm_param_file_name" = ""dsm_param_L""
Mark Hsieh3673a162021-09-22 20:50:33 +0800210 register "vmon_slot_no" = "1"
211 register "imon_slot_no" = "0"
Mark Hsieh111bc432021-08-20 16:59:57 +0800212 device i2c 0x3c on
Mark Hsiehf41da472021-08-02 18:36:39 +0800213 end
214 end
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800215 end #I2C0
216 device ref i2c1 on
Mark Hsieh44577682021-11-23 22:54:01 +0800217 chip drivers/i2c/tpm
218 register "hid" = ""GOOG0005""
219 register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
220 device i2c 50 on end
221 end
222 end
223 device ref i2c3 on
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800224 chip drivers/i2c/hid
Scott Chaocc1a9b52021-08-04 17:34:17 +0800225 register "generic.hid" = ""ELAN9050""
226 register "generic.desc" = ""ELAN Touchscreen""
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800227 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
Matt DeVillier8a0e6b52023-04-27 10:04:27 -0500228 register "generic.detect" = "1"
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800229 register "generic.reset_gpio" =
230 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
Scott Chaoe24b0062021-12-21 14:18:31 +0800231 register "generic.reset_delay_ms" = "200"
Scott Chaocc1a9b52021-08-04 17:34:17 +0800232 register "generic.reset_off_delay_ms" = "1"
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800233 register "generic.enable_gpio" =
234 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
Scott Chaocc1a9b52021-08-04 17:34:17 +0800235 register "generic.enable_delay_ms" = "6"
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800236 register "generic.stop_gpio" =
237 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
238 register "generic.stop_off_delay_ms" = "1"
239 register "generic.has_power_resource" = "1"
240 register "hid_desc_reg_offset" = "0x01"
Scott Chaocc1a9b52021-08-04 17:34:17 +0800241 device i2c 0x15 on end
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800242 end
243 end
244 device ref i2c5 on
245 chip drivers/i2c/generic
246 register "hid" = ""ELAN0000""
247 register "desc" = ""ELAN Touchpad""
248 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
249 register "wake" = "GPE0_DW2_14"
Matt DeVillier2cf52d82022-09-01 15:09:24 -0500250 register "detect" = "1"
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800251 device i2c 0x15 on end
252 end
253 end
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800254 device ref gspi1 on
255 chip drivers/spi/acpi
256 register "name" = ""CRFP""
257 register "hid" = "ACPI_DT_NAMESPACE_HID"
258 register "uid" = "1"
259 register "compat_string" = ""google,cros-ec-spi""
260 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F15_IRQ)"
261 register "wake" = "GPE0_DW2_15"
Tarun Tuli2b523ce2022-08-29 13:39:58 -0400262 register "has_power_resource" = "1"
263 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
264 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
265 register "enable_delay_ms" = "3"
Matt DeVillieraf46b472023-10-28 11:16:14 -0500266 device spi 0 hidden end
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800267 end # FPMCU
268 end
269 device ref pch_espi on
270 chip ec/google/chromeec
271 use conn0 as mux_conn[0]
272 use conn1 as mux_conn[1]
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800273 device pnp 0c09.0 on end
274 end
275 end
276 device ref pmc hidden
277 chip drivers/intel/pmc_mux
278 device generic 0 on
279 chip drivers/intel/pmc_mux/conn
Reka Normand448f8c2021-12-09 12:09:27 +1100280 use usb2_port1 as usb2_port
281 use tcss_usb3_port1 as usb3_port
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800282 device generic 0 alias conn0 on end
283 end
284 chip drivers/intel/pmc_mux/conn
Reka Normand448f8c2021-12-09 12:09:27 +1100285 use usb2_port2 as usb2_port
286 use tcss_usb3_port3 as usb3_port
Scott Chao37d14cf2021-07-23 16:41:48 +0800287 device generic 1 alias conn1 on end
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800288 end
289 end
290 end
291 end
292 device ref tcss_xhci on
293 chip drivers/usb/acpi
294 device ref tcss_root_hub on
295 chip drivers/usb/acpi
296 register "desc" = ""USB3 Type-C Port C0 (MLB)""
297 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
Won Chung9c5a1072022-02-02 22:30:53 +0000298 register "use_custom_pld" = "true"
Subrata Banik11fb6a82022-02-16 17:20:53 +0530299 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(1, 1))"
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800300 device ref tcss_usb3_port1 on end
301 end
302 chip drivers/usb/acpi
303 register "desc" = ""USB3 Type-C Port C1 (DB)""
304 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
Won Chung9c5a1072022-02-02 22:30:53 +0000305 register "use_custom_pld" = "true"
Subrata Banik11fb6a82022-02-16 17:20:53 +0530306 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
Ron Lee558952a2022-12-13 19:48:59 +0800307 register "usb_lpm_incapable" = "true"
Scott Chao37d14cf2021-07-23 16:41:48 +0800308 device ref tcss_usb3_port3 on end
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800309 end
310 end
311 end
312 end
313 device ref xhci on
314 chip drivers/usb/acpi
315 device ref xhci_root_hub on
316 chip drivers/usb/acpi
317 register "desc" = ""USB2 Type-C Port C0 (MLB)""
318 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
Won Chung9c5a1072022-02-02 22:30:53 +0000319 register "use_custom_pld" = "true"
Subrata Banik11fb6a82022-02-16 17:20:53 +0530320 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(1, 1))"
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800321 device ref usb2_port1 on end
322 end
323 chip drivers/usb/acpi
324 register "desc" = ""USB2 Type-C Port C1 (DB)""
325 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
Won Chung9c5a1072022-02-02 22:30:53 +0000326 register "use_custom_pld" = "true"
Subrata Banik11fb6a82022-02-16 17:20:53 +0530327 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800328 device ref usb2_port2 on end
329 end
330 chip drivers/usb/acpi
331 register "desc" = ""USB2 Camera""
332 register "type" = "UPC_TYPE_INTERNAL"
333 register "privacy_gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_D13)"
334 device ref usb2_port6 on end
335 end
336 chip drivers/usb/acpi
337 register "desc" = ""USB2 Type-A Port (MLB)""
338 register "type" = "UPC_TYPE_A"
Won Chung9c5a1072022-02-02 22:30:53 +0000339 register "use_custom_pld" = "true"
Subrata Banik11fb6a82022-02-16 17:20:53 +0530340 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800341 device ref usb2_port8 on end
342 end
343 chip drivers/usb/acpi
344 register "desc" = ""USB2 Bluetooth""
345 register "type" = "UPC_TYPE_INTERNAL"
346 register "reset_gpio" =
347 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
348 device ref usb2_port10 on end
349 end
350 chip drivers/usb/acpi
351 register "desc" = ""USB3 Type-A Port (MLB)""
352 register "type" = "UPC_TYPE_USB3_A"
Won Chung9c5a1072022-02-02 22:30:53 +0000353 register "use_custom_pld" = "true"
Subrata Banik11fb6a82022-02-16 17:20:53 +0530354 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
Mark Hsieha96e9cb2021-06-23 16:23:44 +0800355 device ref usb3_port2 on end
356 end
357 end
358 end
359 end
360 end
Mark Hsieh352042f2021-06-08 09:12:15 +0800361end