Uwe Hermann | d436a4b | 2007-05-03 08:50:37 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the LinuxBIOS project. |
| 3 | * |
| 4 | * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 19 | */ |
| 20 | |
Uwe Hermann | 4cb8553 | 2007-05-27 21:43:58 +0000 | [diff] [blame^] | 21 | /* Datasheet: |
| 22 | * - Name: 82371AB PCI-TO-ISA / IDE XCELERATOR (PIIX4) |
| 23 | * - URL: http://www.intel.com/design/intarch/datashts/290562.htm |
| 24 | * - PDF: http://www.intel.com/design/intarch/datashts/29056201.pdf |
| 25 | * - Order Number: 290562-001 |
| 26 | */ |
| 27 | |
| 28 | #include <console/console.h> |
Uwe Hermann | d436a4b | 2007-05-03 08:50:37 +0000 | [diff] [blame] | 29 | #include <device/device.h> |
Uwe Hermann | 4cb8553 | 2007-05-27 21:43:58 +0000 | [diff] [blame^] | 30 | #include <device/pci.h> |
Uwe Hermann | d436a4b | 2007-05-03 08:50:37 +0000 | [diff] [blame] | 31 | #include "i82371eb.h" |
| 32 | |
Uwe Hermann | 4cb8553 | 2007-05-27 21:43:58 +0000 | [diff] [blame^] | 33 | /** |
| 34 | * Enable access to all BIOS regions. Do not enable write access to the ROM. |
| 35 | * |
| 36 | * @param dev TODO |
| 37 | */ |
Uwe Hermann | d436a4b | 2007-05-03 08:50:37 +0000 | [diff] [blame] | 38 | void i82371eb_enable(device_t dev) |
| 39 | { |
Uwe Hermann | 4cb8553 | 2007-05-27 21:43:58 +0000 | [diff] [blame^] | 40 | uint16_t reg; |
| 41 | |
| 42 | /* Set bit 9: 1-Meg Extended BIOS Enable (PCI master accesses to |
| 43 | * FFF00000-FFF7FFFF are forwarded to ISA). |
| 44 | * Set bit 7: Extended BIOS Enable (PCI master accesses to |
| 45 | * FFF80000-FFFDFFFF are forwarded to ISA). |
| 46 | * Set bit 6: Lower BIOS Enable (PCI master, or ISA master accesses to |
| 47 | * the lower 64-Kbyte BIOS block (E0000-EFFFF) at the top |
| 48 | * of 1 Mbyte, or the aliases at the top of 4 Gbyte |
| 49 | * (FFFE0000-FFFEFFFF) result in the generation of BIOSCS#. |
| 50 | * Note: Accesses to FFFF0000-FFFFFFFF are always forwarded to ISA. |
| 51 | * Set bit 2: BIOSCS# Write Enable (1=enable, 0=disable). |
| 52 | */ |
| 53 | |
| 54 | reg = pci_read_config16(dev, XBCS); |
| 55 | reg |= 0x2c0; |
| 56 | pci_write_config16(dev, XBCS, reg); |
Uwe Hermann | d436a4b | 2007-05-03 08:50:37 +0000 | [diff] [blame] | 57 | } |
| 58 | |
| 59 | struct chip_operations southbridge_intel_i82371eb_ops = { |
| 60 | CHIP_NAME("Intel 82371EB Southbridge") |
| 61 | .enable_dev = i82371eb_enable, |
| 62 | }; |