blob: ee2b46a3170e6024d5e178d156a51914b79baa23 [file] [log] [blame]
Philipp Deppenwiesed8fe4432016-03-18 00:52:54 +01001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2011 The Chromium OS Authors. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
9 * the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <pci/pci.h>
18#include <stdio.h>
19#include <string.h>
20#include <stdlib.h>
21#include <sys/io.h>
22#include <assert.h>
23#include <unistd.h>
24
Philipp Deppenwiese73add172016-08-26 02:10:51 +020025#include "intelmetool.h"
Philipp Deppenwiesed8fe4432016-03-18 00:52:54 +010026#include "me.h"
27#include "mmap.h"
Philipp Deppenwiesed8fe4432016-03-18 00:52:54 +010028
29#define read32(addr, off) ( *((uint32_t *) (addr + off)) )
30#define write32(addr, off, val) ( *((uint32_t *) (addr + off)) = val)
31
32/* Path that the BIOS should take based on ME state */
33/*
34static const char *me_bios_path_values[] = {
35 [ME_NORMAL_BIOS_PATH] = "Normal",
36 [ME_S3WAKE_BIOS_PATH] = "S3 Wake",
37 [ME_ERROR_BIOS_PATH] = "Error",
38 [ME_RECOVERY_BIOS_PATH] = "Recovery",
39 [ME_DISABLE_BIOS_PATH] = "Disable",
40 [ME_FIRMWARE_UPDATE_BIOS_PATH] = "Firmware Update",
41};
42*/
43
44/* MMIO base address for MEI interface */
45static uint32_t mei_base_address;
46static uint8_t* mei_mmap;
47
48static void mei_dump(void *ptr, int dword, int offset, const char *type)
49{
Paul Menzel90d41772017-05-07 08:57:53 +020050 /* struct mei_csr *csr; */
Philipp Deppenwiesed8fe4432016-03-18 00:52:54 +010051
52
53 switch (offset) {
54 case MEI_H_CSR:
55 case MEI_ME_CSR_HA:
Maximilian Schanderdf5b83f2017-10-28 18:33:07 +020056/*
57 csr = ptr;
Paul Menzel90d41772017-05-07 08:57:53 +020058 if (!csr) {
Philipp Deppenwiesed8fe4432016-03-18 00:52:54 +010059 printf("%-9s[%02x] : ", type, offset);
60 printf("ERROR: 0x%08x\n", dword);
61 break;
62 }
63 printf("%-9s[%02x] : ", type, offset);
64 printf("depth=%u read=%02u write=%02u ready=%u "
Maximilian Schanderdf5b83f2017-10-28 18:33:07 +020065 "reset=%u intgen=%u intstatus=%u intenable=%u\n",
66 csr->buffer_depth, csr->buffer_read_ptr,
67 csr->buffer_write_ptr, csr->ready, csr->reset,
68 csr->interrupt_generate, csr->interrupt_status,
69 csr->interrupt_enable);
70*/
71 break;
Philipp Deppenwiesed8fe4432016-03-18 00:52:54 +010072 case MEI_ME_CB_RW:
73 case MEI_H_CB_WW:
74 printf("%-9s[%02x] : ", type, offset);
75 printf("CB: 0x%08x\n", dword);
76 break;
77 default:
78 printf("%-9s[%02x] : ", type, offset);
79 printf("0x%08x\n", offset);
80 break;
81 }
82}
83
84/*
85 * ME/MEI access helpers using memcpy to avoid aliasing.
86 */
87
88static inline void mei_read_dword_ptr(void *ptr, uint32_t offset)
89{
90 uint32_t dword = read32(mei_mmap, offset);
91 memcpy(ptr, &dword, sizeof(dword));
92
93 if (debug) {
94 mei_dump(ptr, dword, offset, "READ");
95 }
96}
97
98static inline void mei_write_dword_ptr(void *ptr, uint32_t offset)
99{
100 uint32_t dword = 0;
101 memcpy(&dword, ptr, sizeof(dword));
102 write32(mei_mmap, offset, dword);
103
104 if (debug) {
105 mei_dump(ptr, dword, offset, "WRITE");
106 }
107}
108
109static inline void pci_read_dword_ptr(struct pci_dev *dev, void *ptr, uint32_t offset)
110{
111 uint32_t dword = pci_read_long(dev, offset);
112 memcpy(ptr, &dword, sizeof(dword));
113
114 if (debug) {
115 mei_dump(ptr, dword, offset, "PCI READ");
116 }
117}
118
119static inline void read_host_csr(struct mei_csr *csr)
120{
121 mei_read_dword_ptr(csr, MEI_H_CSR);
122}
123
124static inline void write_host_csr(struct mei_csr *csr)
125{
126 mei_write_dword_ptr(csr, MEI_H_CSR);
127}
128
129static inline void read_me_csr(struct mei_csr *csr)
130{
131 mei_read_dword_ptr(csr, MEI_ME_CSR_HA);
132}
133
134static inline void write_cb(uint32_t dword)
135{
136 write32(mei_mmap, MEI_H_CB_WW, dword);
137
138 if (debug) {
139 mei_dump(NULL, dword, MEI_H_CB_WW, "WRITE");
140 }
141}
142
143static inline uint32_t read_cb(void)
144{
145 uint32_t dword = read32(mei_mmap, MEI_ME_CB_RW);
146
147 if (debug) {
148 mei_dump(NULL, dword, MEI_ME_CB_RW, "READ");
149 }
150
151 return dword;
152}
153
154/* Wait for ME ready bit to be asserted */
155static int mei_wait_for_me_ready(void)
156{
157 struct mei_csr me;
158 unsigned try = ME_RETRY;
159
160 while (try--) {
161 read_me_csr(&me);
162 if (me.ready)
163 return 0;
164 usleep(ME_DELAY);
165 }
166
167 printf("ME: failed to become ready\n");
168 return -1;
169}
170
171void mei_reset(void)
172{
173 struct mei_csr host;
174
175 if (mei_wait_for_me_ready() < 0)
176 return;
177
178 /* Reset host and ME circular buffers for next message */
179 read_host_csr(&host);
180 host.reset = 1;
181 host.interrupt_generate = 1;
182 write_host_csr(&host);
183
184 if (mei_wait_for_me_ready() < 0)
185 return;
186
187 /* Re-init and indicate host is ready */
188 read_host_csr(&host);
189 host.interrupt_generate = 1;
190 host.ready = 1;
191 host.reset = 0;
192 write_host_csr(&host);
193}
194
195static int mei_send_msg(struct mei_header *mei, struct mkhi_header *mkhi,
196 void *req_data)
197{
198 struct mei_csr host;
199 unsigned ndata , n;
200 uint32_t *data;
201
202 /* Number of dwords to write, ignoring MKHI */
203 ndata = (mei->length) >> 2;
204
205 /* Pad non-dword aligned request message length */
206 if (mei->length & 3)
207 ndata++;
208 if (!ndata) {
209 printf("ME: request does not include MKHI\n");
210 return -1;
211 }
212 ndata++; /* Add MEI header */
213
214 /*
215 * Make sure there is still room left in the circular buffer.
216 * Reset the buffer pointers if the requested message will not fit.
217 */
218 read_host_csr(&host);
219 if ((host.buffer_depth - host.buffer_write_ptr) < ndata) {
220 printf("ME: circular buffer full, resetting...\n");
221 mei_reset();
222 read_host_csr(&host);
223 }
224
225 /*
226 * This implementation does not handle splitting large messages
227 * across multiple transactions. Ensure the requested length
228 * will fit in the available circular buffer depth.
229 */
230 if ((host.buffer_depth - host.buffer_write_ptr) < ndata) {
231 printf("ME: message (%u) too large for buffer (%u)\n",
232 ndata + 2, host.buffer_depth);
233 return -1;
234 }
235
236 /* Write MEI header */
237 mei_write_dword_ptr(mei, MEI_H_CB_WW);
238 ndata--;
239
240 /* Write MKHI header */
241 mei_write_dword_ptr(mkhi, MEI_H_CB_WW);
242 ndata--;
243
244 /* Write message data */
245 data = req_data;
246 for (n = 0; n < ndata; ++n)
247 write_cb(*data++);
248
249 /* Generate interrupt to the ME */
250 read_host_csr(&host);
251 host.interrupt_generate = 1;
252 write_host_csr(&host);
253
254 /* Make sure ME is ready after sending request data */
255 return mei_wait_for_me_ready();
256}
257
258static int mei_recv_msg(struct mei_header *mei, struct mkhi_header *mkhi,
259 void *rsp_data, uint32_t rsp_bytes)
260{
261 struct mei_header mei_rsp;
262 struct mkhi_header mkhi_rsp;
263 struct mei_csr me, host;
264 unsigned ndata, n;
265 unsigned expected;
266 uint32_t *data;
267
268 /* Total number of dwords to read from circular buffer */
269 expected = (rsp_bytes + sizeof(mei_rsp) + sizeof(mkhi_rsp)) >> 2;
270 if (rsp_bytes & 3)
271 expected++;
272
273 if (debug) {
274 printf("expected u32 = %d\n", expected);
275 }
276 /*
277 * The interrupt status bit does not appear to indicate that the
278 * message has actually been received. Instead we wait until the
279 * expected number of dwords are present in the circular buffer.
280 */
281 for (n = ME_RETRY; n; --n) {
282 read_me_csr(&me);
283 if ((me.buffer_write_ptr - me.buffer_read_ptr) >= expected)
284 //if (me.interrupt_generate && !me.interrupt_status)
285 //if (me.interrupt_status)
286 break;
287 usleep(ME_DELAY);
288 }
289 if (!n) {
290 printf("ME: timeout waiting for data: expected "
291 "%u, available %u\n", expected,
292 me.buffer_write_ptr - me.buffer_read_ptr);
293 return -1;
294 }
295 /* Read and verify MEI response header from the ME */
296 mei_read_dword_ptr(&mei_rsp, MEI_ME_CB_RW);
297 if (!mei_rsp.is_complete) {
298 printf("ME: response is not complete\n");
299 return -1;
300 }
301
302 /* Handle non-dword responses and expect at least MKHI header */
303 ndata = mei_rsp.length >> 2;
304 if (mei_rsp.length & 3)
305 ndata++;
306 if (ndata != (expected - 1)) { //XXX
307 printf("ME: response is missing data\n");
308 //return -1;
309 }
310
311 /* Read and verify MKHI response header from the ME */
312 mei_read_dword_ptr(&mkhi_rsp, MEI_ME_CB_RW);
313 if (!mkhi_rsp.is_response ||
314 mkhi->group_id != mkhi_rsp.group_id ||
315 mkhi->command != mkhi_rsp.command) {
316 printf("ME: invalid response, group %u ?= %u, "
317 "command %u ?= %u, is_response %u\n", mkhi->group_id,
318 mkhi_rsp.group_id, mkhi->command, mkhi_rsp.command,
319 mkhi_rsp.is_response);
320 //return -1;
321 }
322 ndata--; /* MKHI header has been read */
323
324 /* Make sure caller passed a buffer with enough space */
325 if (ndata != (rsp_bytes >> 2)) {
326 printf("ME: not enough room in response buffer: "
327 "%u != %u\n", ndata, rsp_bytes >> 2);
328 //return -1;
329 }
330
331 /* Read response data from the circular buffer */
332 data = rsp_data;
333 for (n = 0; n < ndata; ++n)
334 *data++ = read_cb();
335
336 /* Tell the ME that we have consumed the response */
337 read_host_csr(&host);
338 host.interrupt_status = 1;
339 host.interrupt_generate = 1;
340 write_host_csr(&host);
341
342 return mei_wait_for_me_ready();
343}
344
345static inline int mei_sendrecv(struct mei_header *mei, struct mkhi_header *mkhi,
346 void *req_data, void *rsp_data, uint32_t rsp_bytes)
347{
348 if (mei_send_msg(mei, mkhi, req_data) < 0)
349 return -1;
350 if (mei_recv_msg(mei, mkhi, rsp_data, rsp_bytes) < 0)
351 return -1;
352 return 0;
353}
354
355/* Send END OF POST message to the ME */
356/*
357static int mkhi_end_of_post(void)
358{
359 struct mkhi_header mkhi = {
360 .group_id = MKHI_GROUP_ID_GEN,
361 .command = MKHI_END_OF_POST,
362 };
363 struct mei_header mei = {
364 .is_complete = 1,
365 .host_address = MEI_HOST_ADDRESS,
366 .client_address = MEI_ADDRESS_MKHI,
367 .length = sizeof(mkhi),
368 };
369
370 if (mei_sendrecv(&mei, &mkhi, NULL, NULL, 0) < 0) {
371 printf("ME: END OF POST message failed\n");
372 return -1;
373 }
374
375 printf("ME: END OF POST message successful\n");
376 return 0;
377}
378*/
379
380/* Get ME firmware version */
Philipp Deppenwiese73add172016-08-26 02:10:51 +0200381int mkhi_get_fw_version(int *major, int *minor)
Philipp Deppenwiesed8fe4432016-03-18 00:52:54 +0100382{
383 uint32_t data = 0;
384 struct me_fw_version version = {0};
385
386 struct mkhi_header mkhi = {
387 .group_id = MKHI_GROUP_ID_GEN,
388 .command = GEN_GET_FW_VERSION,
389 .is_response = 0,
390 };
391
392 struct mei_header mei = {
393 .is_complete = 1,
394 .host_address = MEI_HOST_ADDRESS,
395 .client_address = MEI_ADDRESS_MKHI,
396 .length = sizeof(mkhi),
397 };
398
399#ifndef OLDARC
400 /* Send request and wait for response */
401 if (mei_sendrecv(&mei, &mkhi, &data, &version, sizeof(version) ) < 0) {
402 printf("ME: GET FW VERSION message failed\n");
403 return -1;
404 }
405 printf("ME: Firmware Version %u.%u.%u.%u (code) "
406 "%u.%u.%u.%u (recovery) "
407 "%u.%u.%u.%u (fitc)\n\n",
408 version.code_major, version.code_minor,
409 version.code_build_number, version.code_hot_fix,
410 version.recovery_major, version.recovery_minor,
411 version.recovery_build_number, version.recovery_hot_fix,
412 version.fitcmajor, version.fitcminor,
413 version.fitcbuildno, version.fitchotfix);
414#else
415 /* Send request and wait for response */
416 if (mei_sendrecv(&mei, &mkhi, &data, &version, 2*sizeof(uint32_t) ) < 0) {
417 printf("ME: GET FW VERSION message failed\n");
418 return -1;
419 }
Matthias Gazzari04864c72018-05-21 19:37:55 +0200420 printf("ME: Firmware Version %u.%u (code)\n\n",
Philipp Deppenwiesed8fe4432016-03-18 00:52:54 +0100421 version.code_major, version.code_minor);
422#endif
Philipp Deppenwiese73add172016-08-26 02:10:51 +0200423 if (major)
424 *major = version.code_major;
425 if (minor)
426 *minor = version.code_minor;
Philipp Deppenwiesed8fe4432016-03-18 00:52:54 +0100427 return 0;
428}
429
Philipp Deppenwiesed8fe4432016-03-18 00:52:54 +0100430/* Get ME Firmware Capabilities */
431int mkhi_get_fwcaps(void)
432{
433 struct {
434 uint32_t rule_id;
435 uint32_t rule_len;
436
437 struct me_fwcaps cap;
438 } fwcaps;
439
440 fwcaps.rule_id = 0;
441 fwcaps.rule_len = 0;
442
443 struct mkhi_header mkhi = {
444 .group_id = MKHI_GROUP_ID_FWCAPS,
445 .command = MKHI_FWCAPS_GET_RULE,
446 .is_response = 0,
447 };
448 struct mei_header mei = {
449 .is_complete = 1,
450 .host_address = MEI_HOST_ADDRESS,
451 .client_address = MEI_ADDRESS_MKHI,
452 .length = sizeof(mkhi) + sizeof(fwcaps.rule_id),
453 };
454
455 /* Send request and wait for response */
456 if (mei_sendrecv(&mei, &mkhi, &fwcaps.rule_id, &fwcaps.cap, sizeof(fwcaps.cap)) < 0) {
457 printf("ME: GET FWCAPS message failed\n");
458 return -1;
459 }
460
461 print_cap("Full Network manageability ", fwcaps.cap.caps_sku.full_net);
462 print_cap("Regular Network manageability ", fwcaps.cap.caps_sku.std_net);
463 print_cap("Manageability ", fwcaps.cap.caps_sku.manageability);
464 print_cap("Small business technology ", fwcaps.cap.caps_sku.small_business);
465 print_cap("Level III manageability ", fwcaps.cap.caps_sku.l3manageability);
466 print_cap("IntelR Anti-Theft (AT) ", fwcaps.cap.caps_sku.intel_at);
Maximilian Schanderdf5b83f2017-10-28 18:33:07 +0200467 print_cap("IntelR Capability Licensing Service (CLS) ", fwcaps.cap.caps_sku.intel_cls);
468 print_cap("IntelR Power Sharing Technology (MPC) ", fwcaps.cap.caps_sku.intel_mpc);
Philipp Deppenwiesed8fe4432016-03-18 00:52:54 +0100469 print_cap("ICC Over Clocking ", fwcaps.cap.caps_sku.icc_over_clocking);
Maximilian Schanderdf5b83f2017-10-28 18:33:07 +0200470 print_cap("Protected Audio Video Path (PAVP) ", fwcaps.cap.caps_sku.pavp);
Philipp Deppenwiesed8fe4432016-03-18 00:52:54 +0100471 print_cap("IPV6 ", fwcaps.cap.caps_sku.ipv6);
472 print_cap("KVM Remote Control (KVM) ", fwcaps.cap.caps_sku.kvm);
473 print_cap("Outbreak Containment Heuristic (OCH) ", fwcaps.cap.caps_sku.och);
474 print_cap("Virtual LAN (VLAN) ", fwcaps.cap.caps_sku.vlan);
475 print_cap("TLS ", fwcaps.cap.caps_sku.tls);
476 print_cap("Wireless LAN (WLAN) ", fwcaps.cap.caps_sku.wlan);
477
478 return 0;
479}
480
481/* Tell ME to issue a global reset */
482uint32_t mkhi_global_reset(void)
483{
484 struct me_global_reset reset = {
485 .request_origin = GLOBAL_RESET_BIOS_POST,
486 .reset_type = CBM_RR_GLOBAL_RESET,
487 };
488 struct mkhi_header mkhi = {
489 .group_id = MKHI_GROUP_ID_CBM,
490 .command = MKHI_GLOBAL_RESET,
491 };
492 struct mei_header mei = {
493 .is_complete = 1,
494 .length = sizeof(mkhi) + sizeof(reset),
495 .host_address = MEI_HOST_ADDRESS,
496 .client_address = MEI_ADDRESS_MKHI,
497 };
498
499 printf("ME: Requesting global reset\n");
500
501 /* Send request and wait for response */
502 if (mei_sendrecv(&mei, &mkhi, &reset, NULL, 0) < 0) {
503 /* No response means reset will happen shortly... */
504 asm("hlt");
505 }
506
507 /* If the ME responded it rejected the reset request */
508 printf("ME: Global Reset failed\n");
509 return -1;
510}
511
512/* Tell ME thermal reporting parameters */
513/*
514void mkhi_thermal(void)
515{
516 struct me_thermal_reporting thermal = {
517 .polling_timeout = 2,
518 .smbus_ec_msglen = 1,
519 .smbus_ec_msgpec = 0,
520 .dimmnumber = 4,
521 };
522 struct mkhi_header mkhi = {
523 .group_id = MKHI_GROUP_ID_CBM,
524 .command = MKHI_THERMAL_REPORTING,
525 };
526 struct mei_header mei = {
527 .is_complete = 1,
528 .length = sizeof(mkhi) + sizeof(thermal),
529 .host_address = MEI_HOST_ADDRESS,
530 .client_address = MEI_ADDRESS_THERMAL,
531 };
532
533 printf("ME: Sending thermal reporting params\n");
534
535 mei_sendrecv(&mei, &mkhi, &thermal, NULL, 0);
536}
537*/
538
539/* Enable debug of internal ME memory */
540int mkhi_debug_me_memory(void *physaddr)
541{
542 uint32_t data = 0;
543
544 /* copy whole ME memory to a readable space */
545 struct me_debug_mem memory = {
546 .debug_phys = (uintptr_t)physaddr,
547 .debug_size = 0x2000000,
548 .me_phys = 0x20000000,
549 .me_size = 0x2000000,
550 };
551 struct mkhi_header mkhi = {
552 .group_id = MKHI_GROUP_ID_GEN,
553 .command = GEN_SET_DEBUG_MEM,
554 .is_response = 0,
555 };
556 struct mei_header mei = {
557 .is_complete = 1,
558 .length = sizeof(mkhi) + sizeof(memory),
559 .host_address = MEI_HOST_ADDRESS,
560 .client_address = MEI_ADDRESS_MKHI,
561 };
562
563 printf("ME: Debug memory to 0x%zx ...", (size_t)physaddr);
564 if (mei_sendrecv(&mei, &mkhi, &memory, &data, 0) < 0) {
565 printf("failed\n");
566 return -1;
567 } else {
568 printf("done\n");
569 }
570 return 0;
571}
572
573/* Prepare ME for MEI messages */
574uint32_t intel_mei_setup(struct pci_dev *dev)
575{
576 struct mei_csr host;
577 uint32_t reg32;
578 uint32_t pagerounded;
579
580 mei_base_address = dev->base_addr[0] & ~0xf;
581 pagerounded = mei_base_address & ~0xfff;
Maximilian Schanderdf5b83f2017-10-28 18:33:07 +0200582 mei_mmap = map_physical(pagerounded, 0x2000);
583 mei_mmap += mei_base_address - pagerounded;
Paul Wisee311f942017-05-04 14:13:38 +0800584 if (mei_mmap == NULL) {
Patrick Rudolphaac3b312018-02-01 16:12:47 +0100585 printf("Could not map ME setup memory.\n"
Jonathan Neuschäfer5be7bb32018-04-17 13:06:49 +0200586 "Do you have kernel cmdline argument 'iomem=relaxed' set ?\n");
Paul Wisee311f942017-05-04 14:13:38 +0800587 return 1;
588 }
Philipp Deppenwiesed8fe4432016-03-18 00:52:54 +0100589
590 /* Ensure Memory and Bus Master bits are set */
591 reg32 = pci_read_long(dev, PCI_COMMAND);
592 reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
593 pci_write_long(dev, PCI_COMMAND, reg32);
594
595 /* Clean up status for next message */
596 read_host_csr(&host);
597 host.interrupt_generate = 1;
598 host.ready = 1;
599 host.reset = 0;
600 write_host_csr(&host);
601
602 return 0;
603}
604
605/* Read the Extend register hash of ME firmware */
606int intel_me_extend_valid(struct pci_dev *dev)
607{
608 struct me_heres status;
609 uint32_t extend[8] = {0};
610 int i, count = 0;
611
612 pci_read_dword_ptr(dev, &status, PCI_ME_HERES);
613 if (!status.extend_feature_present) {
614 printf("ME: Extend Feature not present\n");
615 return -1;
616 }
617
618 if (!status.extend_reg_valid) {
619 printf("ME: Extend Register not valid\n");
620 return -1;
621 }
622
623 switch (status.extend_reg_algorithm) {
624 case PCI_ME_EXT_SHA1:
625 count = 5;
626 printf("ME: Extend SHA-1: ");
627 break;
628 case PCI_ME_EXT_SHA256:
629 count = 8;
630 printf("ME: Extend SHA-256: ");
631 break;
632 default:
633 printf("ME: Extend Algorithm %d unknown\n",
634 status.extend_reg_algorithm);
635 return -1;
636 }
637
638 for (i = 0; i < count; ++i) {
639 extend[i] = pci_read_long(dev, PCI_ME_HER(i));
640 printf("%08x", extend[i]);
641 }
642 printf("\n");
643
644 return 0;
645}