Angel Pons | 4b42983 | 2020-04-02 23:48:50 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* This file is part of the coreboot project. */ |
Bruce Griffith | 27ed80b | 2014-08-15 11:46:25 -0600 | [diff] [blame] | 3 | |
| 4 | /* Note: Only need HID on Primary Bus */ |
| 5 | External (TOM1) |
| 6 | External (TOM2) |
Nico Huber | 7176a54 | 2019-12-13 17:08:49 +0100 | [diff] [blame] | 7 | Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */ |
Bruce Griffith | 27ed80b | 2014-08-15 11:46:25 -0600 | [diff] [blame] | 8 | Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */ |
Nico Huber | 7176a54 | 2019-12-13 17:08:49 +0100 | [diff] [blame] | 9 | |
Bruce Griffith | 27ed80b | 2014-08-15 11:46:25 -0600 | [diff] [blame] | 10 | /* Describe the Northbridge devices */ |
| 11 | |
| 12 | Method(_BBN, 0, NotSerialized) /* Bus number = 0 */ |
| 13 | { |
| 14 | Return(Zero) |
| 15 | } |
| 16 | |
| 17 | Method(_STA, 0, NotSerialized) |
| 18 | { |
| 19 | Return(0x0B) /* Status is visible */ |
| 20 | } |
| 21 | |
| 22 | Method(_PRT,0, NotSerialized) |
| 23 | { |
| 24 | If(PMOD) |
| 25 | { |
| 26 | Return(APR0) /* APIC mode */ |
| 27 | } |
| 28 | Return (PR0) /* PIC Mode */ |
| 29 | } |
| 30 | |
| 31 | Device(AMRT) { |
| 32 | Name(_ADR, 0x00000000) |
| 33 | } /* end AMRT */ |
| 34 | |
| 35 | /* Gpp 0 */ |
| 36 | Device(PBR4) { |
| 37 | Name(_ADR, 0x00020001) |
| 38 | Name(_PRW, Package() {0x18, 4}) |
| 39 | Method(_PRT,0) { |
Elyes HAOUAS | a813160 | 2016-09-19 10:27:57 -0600 | [diff] [blame] | 40 | If(PMOD) { Return(APS4) } /* APIC mode */ |
Bruce Griffith | 27ed80b | 2014-08-15 11:46:25 -0600 | [diff] [blame] | 41 | Return (PS4) /* PIC Mode */ |
| 42 | } /* end _PRT */ |
| 43 | } /* end PBR4 */ |
| 44 | |
| 45 | /* Gpp 1 */ |
| 46 | Device(PBR5) { |
| 47 | Name(_ADR, 0x00020002) |
| 48 | Name(_PRW, Package() {0x18, 4}) |
| 49 | Method(_PRT,0) { |
Elyes HAOUAS | a813160 | 2016-09-19 10:27:57 -0600 | [diff] [blame] | 50 | If(PMOD) { Return(APS5) } /* APIC mode */ |
Bruce Griffith | 27ed80b | 2014-08-15 11:46:25 -0600 | [diff] [blame] | 51 | Return (PS5) /* PIC Mode */ |
| 52 | } /* end _PRT */ |
| 53 | } /* end PBR5 */ |
| 54 | |
| 55 | /* Gpp 2 */ |
| 56 | Device(PBR6) { |
| 57 | Name(_ADR, 0x00020003) |
| 58 | Name(_PRW, Package() {0x18, 4}) |
| 59 | Method(_PRT,0) { |
Elyes HAOUAS | a813160 | 2016-09-19 10:27:57 -0600 | [diff] [blame] | 60 | If(PMOD) { Return(APS6) } /* APIC mode */ |
Bruce Griffith | 27ed80b | 2014-08-15 11:46:25 -0600 | [diff] [blame] | 61 | Return (PS6) /* PIC Mode */ |
| 62 | } /* end _PRT */ |
| 63 | } /* end PBR6 */ |
| 64 | |
| 65 | /* Gpp 3 */ |
| 66 | Device(PBR7) { |
| 67 | Name(_ADR, 0x00020004) |
| 68 | Name(_PRW, Package() {0x18, 4}) |
| 69 | Method(_PRT,0) { |
Elyes HAOUAS | a813160 | 2016-09-19 10:27:57 -0600 | [diff] [blame] | 70 | If(PMOD) { Return(APS7) } /* APIC mode */ |
Bruce Griffith | 27ed80b | 2014-08-15 11:46:25 -0600 | [diff] [blame] | 71 | Return (PS7) /* PIC Mode */ |
| 72 | } /* end _PRT */ |
| 73 | } /* end PBR7 */ |
| 74 | |
| 75 | /* Gpp 4 */ |
| 76 | Device(PBR8) { |
| 77 | Name(_ADR, 0x00020005) |
| 78 | Name(_PRW, Package() {0x18, 4}) |
| 79 | Method(_PRT,0) { |
Elyes HAOUAS | a813160 | 2016-09-19 10:27:57 -0600 | [diff] [blame] | 80 | If(PMOD) { Return(APS8) } /* APIC mode */ |
Bruce Griffith | 27ed80b | 2014-08-15 11:46:25 -0600 | [diff] [blame] | 81 | Return (PS8) /* PIC Mode */ |
| 82 | } /* end _PRT */ |
| 83 | } /* end PBR8 */ |
Michał Żygowski | 09eb8d0 | 2020-02-07 18:39:24 +0100 | [diff] [blame] | 84 | |
| 85 | Device(K10M) { |
| 86 | Name (_ADR, 0x00180003) |
Michał Żygowski | b84c616 | 2020-03-23 14:41:32 +0100 | [diff] [blame] | 87 | #include <soc/amd/common/acpi/thermal_zone.asl> |
Michał Żygowski | 09eb8d0 | 2020-02-07 18:39:24 +0100 | [diff] [blame] | 88 | } |