| Angel Pons | 4b42983 | 2020-04-02 23:48:50 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* This file is part of the coreboot project. */ |
| Mike Loptien | c93a75a | 2014-06-06 15:16:29 -0600 | [diff] [blame] | 3 | |
| 4 | #ifndef _AMD_FAM14_PCI_DEVS_H_ |
| 5 | #define _AMD_FAM14_PCI_DEVS_H_ |
| 6 | |
| Kyösti Mälkki | f7ca672 | 2017-09-10 06:30:54 +0300 | [diff] [blame] | 7 | #include <device/pci_def.h> |
| 8 | |
| Mike Loptien | c93a75a | 2014-06-06 15:16:29 -0600 | [diff] [blame] | 9 | #define BUS0 0 |
| 10 | |
| 11 | /* Graphics and Display */ |
| 12 | #define GFX_DEV 0x1 |
| 13 | #define GFX_FUNC 0 |
| 14 | # define GFX_DEVFN PCI_DEVFN(GFX_DEV,GFX_FUNC) |
| 15 | |
| 16 | /* PCI Ports */ |
| 17 | #define PCI_PORT_DEV 0x14 |
| 18 | #define PCI_PORT_FUNC 4 |
| 19 | # define PCI_PORT_DEVID 0x4384 |
| 20 | # define PCI_PORT_DEVFN PCI_DEVFN(PCI_PORT_DEV,PCI_PORT_FUNC) |
| 21 | |
| 22 | /* PCIe Ports */ |
| 23 | #define NB_PCIE_PORT1_DEV 0x4 |
| 24 | #define NB_PCIE_PORT2_DEV 0x5 |
| 25 | #define NB_PCIE_PORT3_DEV 0x6 |
| 26 | #define NB_PCIE_PORT4_DEV 0x7 |
| 27 | #define NB_PCIE_PORT5_DEV 0x8 |
| 28 | #define NB_PCIE_FUNC 0 |
| 29 | # define NB_PCIE_PORT1_DEVID 0x1512 |
| 30 | # define NB_PCIE_PORT2_DEVID 0x1513 |
| 31 | # define NB_PCIE_PORT3_DEVID 0x1514 |
| 32 | # define NB_PCIE_PORT4_DEVID 0x1515 |
| 33 | # define NB_PCIE_PORT5_DEVID 0x1516 |
| 34 | # define NB_PCIE_PORT1_DEVFN PCI_DEVFN(NB_PCIE_PORT1_DEV,NB_PCIE_FUNC) |
| 35 | # define NB_PCIE_PORT2_DEVFN PCI_DEVFN(NB_PCIE_PORT2_DEV,NB_PCIE_FUNC) |
| 36 | # define NB_PCIE_PORT3_DEVFN PCI_DEVFN(NB_PCIE_PORT3_DEV,NB_PCIE_FUNC) |
| 37 | # define NB_PCIE_PORT4_DEVFN PCI_DEVFN(NB_PCIE_PORT4_DEV,NB_PCIE_FUNC) |
| 38 | # define NB_PCIE_PORT5_DEVFN PCI_DEVFN(NB_PCIE_PORT5_DEV,NB_PCIE_FUNC) |
| 39 | |
| 40 | #endif /* _AMD_FAM14_PCI_DEVS_H_ */ |