blob: 6f9167210600ea57c48ca6fb0dce007214f822ea [file] [log] [blame]
Angel Pons89ab2502020-04-03 01:22:28 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Edward O'Callaghan32960e32014-11-23 17:38:52 +11002
3 /* Routing is in System Bus scope */
4 Name(PR0, Package(){
5 /* NB devices */
6 /* Bus 0, Dev 0 - F15 Host Controller */
Edward O'Callaghan14581fc62014-12-05 04:25:44 +11007 Package(){0x0000FFFF, 0, INTA, 0 },
8 Package(){0x0000FFFF, 1, INTB, 0 },
9 Package(){0x0000FFFF, 2, INTC, 0 },
10 Package(){0x0000FFFF, 3, INTD, 0 },
11
Edward O'Callaghan32960e32014-11-23 17:38:52 +110012 /* Bus 0, Dev 1 - PCI Bridge for Internal Graphics(IGP) */
13 Package(){0x0001FFFF, 0, INTB, 0 },
14 Package(){0x0001FFFF, 1, INTC, 0 },
15
16 /* Bus 0, Dev 2 - PCIe Bridge for x8 PCIe Slot (GFX0) */
17 Package(){0x0002FFFF, 0, INTC, 0 },
18 Package(){0x0002FFFF, 1, INTD, 0 },
19 Package(){0x0002FFFF, 2, INTA, 0 },
20 Package(){0x0002FFFF, 3, INTB, 0 },
21
Edward O'Callaghan32960e32014-11-23 17:38:52 +110022 /* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */
23 Package(){0x0004FFFF, 0, INTA, 0 },
24 Package(){0x0004FFFF, 1, INTB, 0 },
25 Package(){0x0004FFFF, 2, INTC, 0 },
26 Package(){0x0004FFFF, 3, INTD, 0 },
27
28 /* Bus 0, Dev 5 - General purpose PCIe bridge 5 */
29 Package(){0x0005FFFF, 0, INTB, 0 },
30 Package(){0x0005FFFF, 1, INTC, 0 },
31 Package(){0x0005FFFF, 2, INTD, 0 },
32 Package(){0x0005FFFF, 3, INTA, 0 },
33
Edward O'Callaghan32960e32014-11-23 17:38:52 +110034 /* Bus 0, Dev 20 - F0:SMBus/ACPI,F1:IDE;F2:HDAudio;F3:LPC;F4:PCIBridge;F5:USB */
35 Package(){0x0014FFFF, 0, INTA, 0 },
36 Package(){0x0014FFFF, 1, INTB, 0 },
37 Package(){0x0014FFFF, 2, INTC, 0 },
38 Package(){0x0014FFFF, 3, INTD, 0 },
39
40 /* SB devices */
41 /* Bus 0, Dev 18,19,22 - USB: OHCI @ func 0
42 * EHCI @ func 2 */
43 Package(){0x0012FFFF, 0, INTC, 0 },
44 Package(){0x0012FFFF, 1, INTB, 0 },
45
46 Package(){0x0013FFFF, 0, INTC, 0 },
47 Package(){0x0013FFFF, 1, INTB, 0 },
48
49 Package(){0x0016FFFF, 0, INTC, 0 },
50 Package(){0x0016FFFF, 1, INTB, 0 },
51
52 /* Bus 0, Dev 16 - USB: XHCI func 0, 1 */
53 Package(){0x0010FFFF, 0, INTC, 0 },
54 Package(){0x0010FFFF, 1, INTB, 0 },
55
56 /* Bus 0, Dev 17 - SATA controller */
57 Package(){0x0011FFFF, 0, INTD, 0 },
Edward O'Callaghan32960e32014-11-23 17:38:52 +110058 })
59
60 Name(APR0, Package(){
61 /* NB devices in APIC mode */
62 /* Bus 0, Dev 0 - F15 Host Controller */
63
64 /* Bus 0, Dev 1 - PCI Bridge for Internal Graphics(IGP) */
65 Package(){0x0001FFFF, 0, 0, 17 },
66 Package(){0x0001FFFF, 1, 0, 18 },
67
68 /* Bus 0, Dev 2 - PCIe Bridge for x8 PCIe Slot (GFX0) */
69 Package(){0x0002FFFF, 0, 0, 18 },
70 Package(){0x0002FFFF, 1, 0, 19 },
71 Package(){0x0002FFFF, 2, 0, 16 },
72 Package(){0x0002FFFF, 3, 0, 17 },
73
Edward O'Callaghan32960e32014-11-23 17:38:52 +110074 /* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */
75 Package(){0x0004FFFF, 0, 0, 16 },
76 Package(){0x0004FFFF, 1, 0, 17 },
77 Package(){0x0004FFFF, 2, 0, 18 },
78 Package(){0x0004FFFF, 3, 0, 19 },
79
80 /* Bus 0, Dev 5 - General purpose PCIe bridge 5 */
81 Package(){0x0005FFFF, 0, 0, 17 },
82 Package(){0x0005FFFF, 1, 0, 18 },
83 Package(){0x0005FFFF, 2, 0, 19 },
84 Package(){0x0005FFFF, 3, 0, 16 },
85
Edward O'Callaghan32960e32014-11-23 17:38:52 +110086 /* Bus 0, Dev 20 - F0:SMBus/ACPI, F1:IDE; F2:HDAudio; F3:LPC; F4:PCIBridge; F5:USB */
87 Package(){0x0014FFFF, 0, 0, 16 },
88 Package(){0x0014FFFF, 1, 0, 17 },
89 Package(){0x0014FFFF, 2, 0, 18 },
90 Package(){0x0014FFFF, 3, 0, 19 },
91
92 /* SB devices in APIC mode */
93 /* Bus 0, Dev 18,19,22 - USB: OHCI @ func 0
94 * EHCI @ func 2 */
95 Package(){0x0012FFFF, 0, 0, 18 },
96 Package(){0x0012FFFF, 1, 0, 17 },
97
98 Package(){0x0013FFFF, 0, 0, 18 },
99 Package(){0x0013FFFF, 1, 0, 17 },
100
101 Package(){0x0016FFFF, 0, 0, 18 },
102 Package(){0x0016FFFF, 1, 0, 17 },
103
104 /* Bus 0, Dev 16 - USB: XHCI func 0, 1 */
105 Package(){0x0010FFFF, 0, 0, 0x12},
106 Package(){0x0010FFFF, 1, 0, 0x11},
107
108 /* Bus 0, Dev 17 - SATA controller */
109 Package(){0x0011FFFF, 0, 0, 19 },
Edward O'Callaghan32960e32014-11-23 17:38:52 +1100110 })
111
112 Name(PS2, Package(){
113 /* The external GFX - Hooked to PCIe slot 2 */
114 Package(){0x0000FFFF, 0, INTC, 0 },
115 Package(){0x0000FFFF, 1, INTD, 0 },
116 Package(){0x0000FFFF, 2, INTA, 0 },
117 Package(){0x0000FFFF, 3, INTB, 0 },
118 })
119 Name(APS2, Package(){
120 /* The external GFX - Hooked to PCIe slot 2 */
121 Package(){0x0000FFFF, 0, 0, 18 },
122 Package(){0x0000FFFF, 1, 0, 19 },
123 Package(){0x0000FFFF, 2, 0, 16 },
124 Package(){0x0000FFFF, 3, 0, 17 },
125 })
126
127 Name(PS4, Package(){
128 /* PCIe slot - Hooked to PCIe slot 4 */
129 Package(){0x0000FFFF, 0, INTA, 0 },
130 Package(){0x0000FFFF, 1, INTB, 0 },
131 Package(){0x0000FFFF, 2, INTC, 0 },
132 Package(){0x0000FFFF, 3, INTD, 0 },
133 })
134 Name(APS4, Package(){
135 /* PCIe slot - Hooked to PCIe slot 4 */
136 Package(){0x0000FFFF, 0, 0, 16 },
137 Package(){0x0000FFFF, 1, 0, 17 },
138 Package(){0x0000FFFF, 2, 0, 18 },
139 Package(){0x0000FFFF, 3, 0, 19 },
140 })
141
142 Name(PS5, Package(){
143 /* PCIe slot - Hooked to PCIe slot 5 */
144 Package(){0x0000FFFF, 0, INTB, 0 },
145 Package(){0x0000FFFF, 1, INTC, 0 },
146 Package(){0x0000FFFF, 2, INTD, 0 },
147 Package(){0x0000FFFF, 3, INTA, 0 },
148 })
149 Name(APS5, Package(){
150 /* PCIe slot - Hooked to PCIe slot 5 */
151 Package(){0x0000FFFF, 0, 0, 17 },
152 Package(){0x0000FFFF, 1, 0, 18 },
153 Package(){0x0000FFFF, 2, 0, 19 },
154 Package(){0x0000FFFF, 3, 0, 16 },
155 })
Edward O'Callaghan32960e32014-11-23 17:38:52 +1100156 Name(PS6, Package(){
Edward O'Callaghan32960e32014-11-23 17:38:52 +1100157 })
158 Name(APS6, Package(){
Edward O'Callaghan32960e32014-11-23 17:38:52 +1100159 })
Edward O'Callaghan32960e32014-11-23 17:38:52 +1100160 Name(PS7, Package(){
Edward O'Callaghan32960e32014-11-23 17:38:52 +1100161 })
162 Name(APS7, Package(){
Edward O'Callaghan32960e32014-11-23 17:38:52 +1100163 })
Edward O'Callaghan32960e32014-11-23 17:38:52 +1100164 Name(PCIB, Package(){
Edward O'Callaghan32960e32014-11-23 17:38:52 +1100165 })