blob: 543ac57f01cb3c3ea7043481929ccd6570d5070f [file] [log] [blame]
Arthur Heymans7b9c1392017-04-09 20:40:39 +02001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2008-2009 coresystems GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
9 * the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <console/console.h>
18#include <device/device.h>
19#include <device/pci.h>
Kyösti Mälkkif1b58b72019-03-01 13:43:02 +020020#include <device/pci_ops.h>
Arthur Heymans7b9c1392017-04-09 20:40:39 +020021#include <device/pci_ids.h>
Arthur Heymans349e0852017-04-09 20:48:37 +020022#include "i82801jx.h"
Arthur Heymans7b9c1392017-04-09 20:40:39 +020023#include <device/pci_ehci.h>
24
25static void usb_ehci_init(struct device *dev)
26{
27 u32 reg32;
28
29 printk(BIOS_DEBUG, "EHCI: Setting up controller.. ");
30 reg32 = pci_read_config32(dev, PCI_COMMAND);
31 reg32 |= PCI_COMMAND_MASTER;
32 pci_write_config32(dev, PCI_COMMAND, reg32);
33
34 printk(BIOS_DEBUG, "done.\n");
35}
36
Elyes HAOUAS1a8c1df2018-05-13 13:36:44 +020037static void usb_ehci_set_subsystem(struct device *dev, unsigned vendor,
38 unsigned device)
Arthur Heymans7b9c1392017-04-09 20:40:39 +020039{
40 u8 access_cntl;
41
42 access_cntl = pci_read_config8(dev, 0x80);
43
44 /* Enable writes to protected registers. */
45 pci_write_config8(dev, 0x80, access_cntl | 1);
46
47 if (!vendor || !device) {
48 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
49 pci_read_config32(dev, PCI_VENDOR_ID));
50 } else {
51 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
52 ((device & 0xffff) << 16) | (vendor & 0xffff));
53 }
54
55 /* Restore protection. */
56 pci_write_config8(dev, 0x80, access_cntl);
57}
58
59static const unsigned short pci_device_ids[] = {
Arthur Heymans349e0852017-04-09 20:48:37 +020060 0x3a3a,
61 0x3a6a,
62 0x3a3c,
63 0x3a6c,
Arthur Heymans7b9c1392017-04-09 20:40:39 +020064 0
65};
66
67static struct pci_operations lops_pci = {
68 .set_subsystem = &usb_ehci_set_subsystem,
69};
70
71static struct device_operations usb_ehci_ops = {
72 .read_resources = pci_ehci_read_resources,
73 .set_resources = pci_dev_set_resources,
74 .enable_resources = pci_dev_enable_resources,
75 .init = usb_ehci_init,
76 .scan_bus = 0,
77 .ops_pci = &lops_pci,
78};
79
80static const struct pci_driver pch_usb_ehci1 __pci_driver = {
81 .ops = &usb_ehci_ops,
82 .vendor = PCI_VENDOR_ID_INTEL,
83 .devices = pci_device_ids,
84};