| Vladimir Serbinenko | e7e9502 | 2014-01-12 15:26:15 +0100 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007-2009 coresystems GmbH |
| 5 | * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 19 | */ |
| 20 | |
| 21 | #define THINKPAD_EC_GPE 17 |
| 22 | #define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB |
| 23 | #define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB |
| 24 | #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0 |
| 25 | #define RP03_IS_EXPRESSCARD 1 |
| 26 | |
| 27 | DefinitionBlock( |
| 28 | "dsdt.aml", |
| 29 | "DSDT", |
| 30 | 0x02, // DSDT revision: ACPI v2.0 |
| 31 | "COREv4", // OEM id |
| Vladimir Serbinenko | 4737b0c | 2014-01-22 17:12:56 +0100 | [diff] [blame^] | 32 | "COREBOOT", // OEM table id |
| Vladimir Serbinenko | e7e9502 | 2014-01-12 15:26:15 +0100 | [diff] [blame] | 33 | 0x20110725 // OEM revision |
| 34 | ) |
| 35 | { |
| 36 | // Some generic macros |
| 37 | #include "acpi/platform.asl" |
| 38 | #include "acpi/mainboard.asl" |
| 39 | |
| 40 | // global NVS and variables |
| 41 | #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> |
| 42 | |
| 43 | // General Purpose Events |
| 44 | //#include "acpi/gpe.asl" |
| 45 | |
| 46 | #include <cpu/intel/model_206ax/acpi/cpu.asl> |
| 47 | |
| 48 | Scope (\_SB) { |
| 49 | Device (PCI0) |
| 50 | { |
| 51 | #include <northbridge/intel/sandybridge/acpi/sandybridge.asl> |
| 52 | #include <southbridge/intel/bd82x6x/acpi/pch.asl> |
| 53 | } |
| 54 | } |
| 55 | |
| 56 | #include "acpi/video.asl" |
| 57 | |
| 58 | /* Chipset specific sleep states */ |
| 59 | #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> |
| 60 | } |